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Visjnoe

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Bandpass ADC for low-IF receiver
May 22^nd, 2009, 10:15am

I have been looking into architectures for low-IF receivers. Some of them use a bandpass (sigma-delta) ADC before entering the modem. Subsequently, the signal is down-converted to DC digitally.

I have been wondering what would be the disadvantage of preceding the ADC with a second (analog) down-conversion mixer (down-conversion from IF to DC), thus allowing a low-pass (sigma-delta) ADC instead of a bandpass (sigma-delta) ADC. The mixer could be passive (linear). I would think this could also reduce Fs of the ADC and thus the power consumption?

Any insights/comments are welcome.

Peter

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vivkr

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Re: Bandpass ADC for low-IF receiver
Reply #1 - Jun 2^nd, 2009, 3:17am

Hi Peter,

I have not looked into bandpass ADCs in detail but a couple of points come to my mind:

1. The sampling rate for a bandpass ADC also does not need to be as high as you probably imagine. In principle, this also needs to be just oversampling ratio * signal bandwidth of interest. On the surface, I would imagine that a discrete-time bandpass modulator would not require the clock to be comparable to the IF in narrowband systems.

2. You can of course perform a downconversion with an analog mixer but of course, this requires a good, precise mixer, and also some way to remove images etc. which may be easier and cheaper to do in the digital domain as would be possible with a bandpass modulator.

I think ultimately it is probably due to other factors: (a) the desire to make an alternative system based on a bandpass modulator (you can publish more papers like this), (b) potentially higher amount of flexibility in the receive chain due to the digitization occuring closer to the antenna, (c) potential for reducing cost of the receiver chip etc.

I think that you would find good information in a textbook dealing with delta-sigma modulators (Schreier & Temes - Understanding Delta-Sigma Converters) or in a reference dealing with radio receiver architectures.

Best regards,

Vivek

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aaron_do

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Re: Bandpass ADC for low-IF receiver
Reply #2 - Jun 2^nd, 2009, 4:13am

Hi all,

this is a paper recommended by another member

Quote:

See paper on ZigBee Transceiver which is zero-IF architecture by ADI in ISSCC-2009.

[24.4] "A Highly Integrated Low-Power 2.4GHz Transceiver Using a Direct-Conversion Diversity Receiver in 0.18um CMOS for IEEE802.15.4 WPAN"
G.Retz1, H.Shanan1, K.Mulvaney1, S.O'Mahony1, M.Chanca2, P.Crowley3, C.Billon1, K.Khan1, P.Quinlan1
1Analog Devices, Cork, Ireland; 2Analog Devices, Valencia, Spain; 3Analog Devices, Limerick, Ireland

I personally haven't read the paper as it hasn't yet been uploaded to IEEE xplore but if you can get your hands on it, I think it is very relevant (not actually low-IF but does use sigma delta).

cheers,
Aaron

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currant

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Re: Bandpass ADC for low-IF receiver
Reply #3 - Jun 2^nd, 2009, 6:17am

Hi, Peter.

I think tne main problem of Zero-IF receiver is DC offset, and LO leakage to IF-signal, that produces variable in time DC offset.

Also if we work with not-AM (FM, PM) modulated signal, we need to keep both spectrum side of career, so we need separate signal into analog I and Q chanels (two mixers with their mismatches). Digital demodulation is superior than analog in this case.
We may convert IF-signal into digital form and then demodulate it (signal) with digital blocks.
As I understand, we may use Nyquist-rate ADC, but bandpass sigma-delta is more power and size effective.

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