icekalt
Community Member
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Posts: 36
Aalen, Germany
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Hello everyone,
Please see my output waveform of my comparator in attachment. The comparator should make decision when the clock (Vclk) is low. Vp and Vn are the input of my comparator.Vout- is the output of my comparator. If you see the waveform, the output will be 3.3 although Vn is greater than Vp at certain time. For example, at 224.959ns, Vp is greater than Vn, but the comparator is in reset(no decison) in this time and the Vout- is appr. 1.7 V and it is fine. But when the clock is low, instead of comparing the present value of Vn and Vp, it compares the previous value of Vn and Vp that is at 224.959ns. Is this result ok or no? Is this what we called latency problem?
Thx in advanced
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