Hi,
I am new to sdm design, and I'm not good at MATLAB or Verilog-AMS either. Supposed I have a MASH111 sigma delta modulator with input word of 20 bits( 16LSBs setting the fractional part going into 16bit accumulator and 4MSBs setting the integer part going into last output adders). This sdm has 4bit output,which control the multi-modulus divider,which in binary number will be any value from 0 to 15.(fs=25MHz). I ran a transient simulation in spectre for 100uS which is about 2500 samples of fs ( I know it might be too short of 2^16=65,536 ),and set fracn<15:0>=0.5*65536=32768 and int<19:16>=8
1) I just want to check the average value of output code. I used the average function of calculator,ex
average(VT("/out<3>")/1.8*8+(VT("/out<2>")/1.8*4+(VT("/out<1>")/1.8*2+VT("/out<0
>")/1.8)))
Is it the right way to do??
I expect to see the number of ~8.5, and I got ~8.1.
when I reset int<19:16>=0, I have a number of ~3.1???
2)I want to check power spectrum density of output code,ex:
dB10(psd(VT("/out<0>"),0,100u,1024, ?windowName "Hanning", ?smooth 1, ?windowSize 512, ?detrending "None", ?cohGain 1))
Is it the right way to do ?
I did not see the sigma delta noise shape at output. Maybe because I did not run long enough ??
Please help.
Thanks alot,