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designing peaking in input match with good group delay (Read 2876 times)
vivkr
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designing peaking in input match with good group delay
Sep 09th, 2009, 6:48am
 
Hi all,

I need to design an input match network for my wideband Rx. I am using an inductor to get some dB peaking into my capacitive load (amp input). However, the phase response is ruined by this. So I would like to build an equalizer up front.

I used methods outlined on Dr. Howard Johnson's website. I can reduce the spread of group delay quite well like this, and I also get good peaking but the method adds in a fixed attenuation which keeps getting larger and larger as you increase the peaking. In other words, I can get peaking at my halfbaud but this is symbolic (more or less) as the absolute power level remains more or less the same in dB. I am only reducing the lower-frequency gain of my system. I tried some similar variants. The basic idea is described in:

http://www.sigcon.com/Pubs/edn/ConstantREqualizer.htm

Is there a good way which can be used to get real peaking and gain while preserving a decent phase response?

Any ideas are most welcome.

Best regards,

Vivek
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aaron_do
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Re: designing peaking in input match with good group delay
Reply #1 - Sep 9th, 2009, 6:45pm
 
Hi Vivek,


I'm not sure how well it would work with on-chip inductors, but have you tried a simple multi-stage matching network? i.e. cascaded L sections. What kind of bandwidth are you looking at and is it your signal bandwidth or the system bandwidth?


cheers,
Aaron
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vivkr
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Re: designing peaking in input match with good group delay
Reply #2 - Sep 10th, 2009, 12:16am
 
aaron_do wrote on Sep 9th, 2009, 6:45pm:
Hi Vivek,


I'm not sure how well it would work with on-chip inductors, but have you tried a simple multi-stage matching network? i.e. cascaded L sections. What kind of bandwidth are you looking at and is it your signal bandwidth or the system bandwidth?

Hi Aaron,

I am using multiple sections, i.e. coupled inductors etc. in order to get a good match which seems to be no issue using the textbook-based techniques. However, I need to provide a little bit of gain at half-baud to overcome higher channel and insertion losses at this frequency. I could not tell you the exact frequency but that is not really important.
What I see is that the group delay is poor using simple inductor sections with no equalization.

Hence, I used the scheme shown in this paper (link in first post), but I see that this achieves the peaking not by raising gain at half-baud but by suppressing it at lower frequencies. I am not sure whether there are good ways of achieving gain peaking without ruining the group delay in a reasonable manner. If you could suggest some ideas, then that would be great.

By the way, I found the use of the equalizer idea also in another paper (JSSC Dec. 2007, by Dally, Poulton et al.) They also let the low-frequency gain drop in order to get peaking. This implies that they need to get more gain somewhere later in their signal path. Noise is not critical I think for these chip-chip links described in their paper.

Regards,

Vivek

cheers,
Aaron

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