Forum
Forum
Verilog-AMS
Analysis
Modeling
Design
Theory
Welcome, Guest. Please
Login
or
Register.
Please follow the Forum
guidelines
.
Jul 17
th
, 2024, 6:25am
Home
Help
Search
Login
Register
PM to admin
The Designer's Guide Community Forum
›
Design Languages
›
Verilog-AMS
› Can anyone upload the Verilog-AMS code for NAND gate
‹
Previous topic
|
Next topic
›
Pages: 1
Can anyone upload the Verilog-AMS code for NAND gate (Read 2642 times)
somisetty
Community Member
Offline
Posts: 64
Can anyone upload the Verilog-AMS code for NAND gate
Oct 26
th
, 2009, 11:06pm
Hi everybody,
Can anyone upload the Verilog-AMS code for NAND gate
Thanks
Back to top
IP Logged
Geoffrey_Coram
Senior Fellow
Offline
Posts: 1999
Massachusetts, USA
Re: Can anyone upload the Verilog-AMS code for NAND gate
Reply #1 -
Oct 27
th
, 2009, 4:44am
Click "Verilog-AMS" in the header of this page, look for "Functional Models"
or use
http://www.designers-guide.org/VerilogAMS/functional-blocks/gates/gates.va
this link.
Back to top
If at first you do succeed, STOP, raise your standards, and stop wasting your time.
IP Logged
somisetty
Community Member
Offline
Posts: 64
Re: Can anyone upload the Verilog-AMS code for NAND gate
Reply #2 -
Oct 27
th
, 2009, 9:21pm
Hi
Please send me the test bench (code availabe in Verilog-AMS) of NAND gate for HSPICE simulator(SYNOPSYS)
Thank in advance
Back to top
IP Logged
Geoffrey_Coram
Senior Fellow
Offline
Posts: 1999
Massachusetts, USA
Re: Can anyone upload the Verilog-AMS code for NAND gate
Reply #3 -
Oct 28
th
, 2009, 10:17am
You should be able to write your own testbench. If not, then how can you know whether a testbench someone else sends you is any good?
Back to top
If at first you do succeed, STOP, raise your standards, and stop wasting your time.
IP Logged
Pages: 1
‹
Previous topic
|
Next topic
›
Forum Jump »
» 10 most recent Posts
» 10 most recent Topics
Design
- RF Design
- Analog Design
- Mixed-Signal Design
- High-Speed I/O Design
- High-Power Design
- Mixed-Technology Design
Analog Verification
- Analog Functional Verification
- Analog Performance Verification
Measurements
- RF Measurements
- Phase Noise and Jitter Measurements
- Other Measurements
Modeling
- Semiconductor Devices
- Passive Devices
- Behavioral Models
- Transmission Lines and Other Distributed Devices
Design Languages
»» Verilog-AMS
- VHDL-AMS
Simulators
- Circuit Simulators
- RF Simulators
- AMS Simulators
- Timing Simulators
- System Simulators
- Logic Simulators
Other CAD Tools
- Entry Tools
- Physical Verification, Extraction and Analysis
- Unmet Needs in Analog CAD
General
- Tech Talk
- News
- Comments and Suggestions
- Opportunities
« Home
‹ Board
The Designer's Guide Community Forum
» Powered by
YaBB 2.2.2
!
YaBB
© 2000-2008. All Rights Reserved.
Copyright 2002-2024
Designer’s Guide Consulting, Inc.
Designer’s Guide
® is a registered trademark of
Designer’s Guide Consulting, Inc.
All rights reserved.
Send comments or questions to
editor@designers-guide.org
. Consider
submitting
a paper or model.