AnalogDE
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I am using some PMOS MOS caps in my comparator design which are used for offset cancellation (MIM caps not available in my process). I am biasing the caps in inversion region, but because of supply/headroom constraints the bias can be at the worst case around vtp or a little less.
Can I compensate for the risk of getting less capacitance by adding option caps to increase the effective area of the cap, or must I ensure my biasing has > vtp across the MOS cap?
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