Hi, friend,

There is clock in my analog circuit, so the VDD current is also a positive "clock current" with small duty-cycle. During simulation, I get the AVERAGE current is 5mA and RMS current is 26mA, however the measurement result power is 12mA.

So which simulation result should be used? It seems AVE and RMS are both incorrect.

I use a meter in series at VDD, observe the current on it.
I have no simulation according to the actual measurement since I don't know how to simulate the real case, such as packaging model, meter internal device and so on.