Dear All,
I am designing a PLL now.
I can run the VCO phase noise simulation, and got an acceptable result.
I want to see the overall phase noise performance of PLL.
So, I run the same simulation for PLL.
But the simulation always fails.
Cadence says the memory is insufficient, when pss is finished and pnoise is just started.
Sometime, the simulation can not converge when pss is running.
Is the direct PLL Pnoise simulation feasible?
Please help me~~~~~~~