cmos.analogvala
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India
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All, We have recently fabricated our first chip. I measured Id-Vg of the device with gate and drain shorted. This diode connected PMOS' Id-vg's gate terminal taken out to pad thru ESD and it's source is also taken out thru ESD. Now, when I keep its Vsource=1.8V and Vgate=1.8, I see current coming out of source terminal !!! In other words I observe PMOS conducting in opposite direction when VD=VD=VS=1.8 for a 0.18u nominal Vt device !!
Any clues why so ?
-CA
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