hali wrote on Feb 9^th, 2010, 2:50am:
What do you want to do ?

Do you want to use competely same ROM access in Verilog-D ?
If so, use Verilog-AMS.

If you simply want to use some table written by ascii code, use $table_model() in Verilog-A.
See http://www.designers-guide.org/Forum/YaBB.pl?num=1239903838

Do you understand Verilog-A, Verilog-D and Verilog-AMS ?

hali wrote on Feb 9^th, 2010, 12:39pm:
Available variables are 32bit integer and 64bit real in Verilog-A.  
Simply declare array of integer.
   "integer mem8b10b[0:9];"

You can write content of mem8b10b to file by "$strobe()".
You can read back content of file by "$table_model()".

It seems that your application is RAM not ROM.

Both "$strobe()" and "$table_model()" are not needed.