I am designing conventional Voltage Regulator and to emulate the package inductance sensitivity to stability analysis; in the test bench I have total 3 Voltage Regs (which is realistic scenario on the chip), which gives voltage output to 3 different lanes.
Let's name the Regs as Reg1, Reg2 and Reg3 respectively.
If I power down the remaining 2 Regs and power up only one Reg (say Reg1); that may the test mode scenario and I am seeing the worst case PM and GM.
Now, if Reg1 is ON and remaining 2 Regs are also ON; and I am probing the PM and GM of Reg1, it has some PM and GM numbers.
To simulate the worst case, I power down 2 regs and only Reg1 is ON and I get different PM and GM numbers.

And here goes my question; in 1st case when all Regs are ON, there would be DC-op point (quiescent point) calculated by the simulator for Reg1 and then there would be frequency sweep and this is how I get the value of PM and GM.
In another case, when 2 Regs are Power Down and only Reg1 is ON, simulator would have again calculated new DC-op point, but this DC-op point of Reg1 would be different from DC-op point of Reg1 in earlier case. I am saying this because I get new PM and GM numbers for the same Reg1
I want to emphasize here; nothing is changed for Reg1 in either case because it is ON is both cases but still it has different DC-op point, which might get disturbed due to 2 OFF Regs in later case.
Should I believe on my data; because DC-op point of any ckt. has to be unique and same ckt  can never have different DC-op points.

PS. All the three Regs are connected to each other through Package and getting Power Supply from it.

bharat,

The scenario looks a little complex. If you have schematic/diagram/data/waveform/plot to show your circuit and result, probably it is easier for me to understand your situation.

Yawei