I am now working on a project relating to circuit simulation. This project requires to develop a simulator that works as hspice or spectre. The emphasis here is not to develop a purely academic tool to verify new ideas and publish papers, otherwise spice3f5 can be adopted directly. The simulator should be able to be used for real designs.

The most straightforward way is to work on an existing versin of spice, like spice3f5 or its enhanced versions like ngspice. Before rushing into writting code, I want to estimate how much effort I need to pay before getting a decent simulator that is to some extent 'close' to hspice or spectre. To be more specific, the simulator needs to be:

1) as robust and accurate as hspice or spectre. Comparisons with hspice and spectre need to be done for typical analog circuits, and the results should not be distinguishably different.

2) not significantly slower than hspice or spectre in transient simulation of small to medium size circuits (N < 1000 or so), 2X to 3X slower may be acceptable.

What I want to know is how hard it is to achieve the above specs given the resources that are commonly available in Universities. Basically this is equivalent to asking that after so many years developments of circuit simulators, how much new stuff has been added in hspice or spectre based upon the techniques that has been used 20 years ago in Berkeley spice. Currently spice, or even ngspice, is much slower than hspice and spectre, and its convergence is also not very good. Is it easy to resolve these issues with all-known tricks or the EDA vendors have some "secret ingredients"?

- leander

Thanks for your quick reply, Andrew.

I fully aware the efforts paid by comercial companies during the past two decades, and my intent is not something to compete with hspice and spectre. The performance requirement is not very high as mentioned in my original post.

Let me change a way of asking. If starting with an open source spice, and applying major well-known improvements that are available in literature, and only focusing on transient simulation, what can be expected? 5X, 3X, or even 2X slower than hspice? It would be good if someone may share some experience on, e.g. which part should be the first to work on, integration algorithm, time step control, Newton's method, etc...

As a preliminary experiment to justify the aforementioned speed-down factor of 2X~5X, I have tested the latest version of ngspice using a circuit with a few hundred components. Ngspice is about 9X slower than Hspice. The time points of ngspice is 5X more than that of hspice. So I am expecting to see a "speed-down" factor of 5X, or more optimistically 2X~3X be achieved after reasonable improvements.

- leander

I think the major step from spice3g5 was more efficient sparse matrix code which reflect or is tuned to the actual memory hierachy. Matrix runtime dominate for biggers circuits and most good sparse code use the CPU only to 10-20% max. That seems not to change because sparse code has an unmatched data structure to the deep pipeline execution. Special processors can boost speed by about 10x and power by 100x or more. But the hw dev cost does not justify a special purpose processor.

Other techniques use the partly circuit inactivity to reduce the matrix update only on active parts or reduction of duplicate cells.

To my understanding only research into uncovered directions make sense for circuit simulation. You can probably dev a simulator for less cost but the existing code is already in work and you can only earn on the profitbility tail.

So search in new directions.

1. True multirate time integration
2. Variable resolution for each instance
3. Parallel device equation resolution
4. Instant device equation->table conversion
5. Combination of sparse direct and indirect matrix solution
6. Parallel sparse matrix code optimization to circuit simulation
7. Cloud integration

The papers which reflect a little bit of the above have the titles:

Performance Comparison of Single-Precision SPICE Model-Evaluation
on FPGA, GPU, Cell, and multi-core Processors

Improving Analog Simulation Speed using Selective Matrix Update

KLU{A HIGH PERFORMANCE SPARSE LINEAR SOLVER
FOR CIRCUIT SIMULATION PROBLEMS