Hi,
@ Jerry : Yes Sir, CMRR will degrade at higher frequencies...But if cap is chosen keeping in mind the CMRR / CMFB LoopGain BW, then it should not be a problem i guess.
Anyways, A cap at Bias OR Passive RC filtering will bring down noise injection from Bias cktry...which is widely used now...But it wont bring down Noise injection from Tail Current Source.
Also, can somebody explain wot "nobody" said
![Tongue Tongue](https://designers-guide.org/forum/Templates/Forum/default/tongue.gif)
& I
Quote:Pmos input pairs are used for low flicker noise,I guess.
For same Gm, pMOS will require larger sizes than nMOS, thus reducing the flicker noise ?? ...
Or is there something deeper coming into play here ??
thanks,
Mayank.