Hi,

I'm trying to use Spectre to simulate the loop stability of the AGC shown below.

Since the loop can only work properly when a signal (sine wave) is presented at vin, is there any particular way to simulate the loop stability in such cases?

I tried PSS+PSTB, but the outputs are just two flat lines (phase margin & gain margin), which does not make any sense.

Thanks.

Ruritania wrote on Apr 30^th, 2010, 11:55am:


Hi RURITANIA,

I do not use SPECTRE. However, some general comments are to be given - independent on the simulator engine used.
Since the AGC loop is inherently non-linear it must be linearized before the rules of linear circuit theory may be applied (loop gain, phase margin,...)
At first, what kind of voltage controlled amplifier are you using?
I suppose, it will be "linear-in-dB" , correct?
In this case, you have to use the log function to linearize with the result that input/output/reference signals now are in dBV.
At second, you have to realize that the circuit only responds to changes of the input signal. With this in mind you can create a linearized block diagram in the s-domain which leads to the following loop gain expression:
Loop gain AL=-Kd*Kc*Fd*Fr  with
Kd=Vref*2.3/20 in V/dB ;
Kc=Ko*20/2.3 in dB/V  (Ko=sensitivity of gain control in exp(Ko*Vcontrol) ;
Fd=transfer function of level detector
Fr=Transfer function of controller/filter (smoothing of control voltage)

This model applies only for an amplifier which is "linear-in-dB" . The model does NOT depend on the level of inpiut power, but the variations of the input signal are limited to app. +- 1.5 dB (validity of the linear model).
Hope this helps.
Good luck and regards.

buddypoor wrote on May 1^st, 2010, 1:47am:


Hi buddypoor,

Thanks for your kind reply.

You raised a really important point that the previously mentioned stability theory can only be applied to the linearized circuits or components. Yes, my VGA is "linear-in-dB," and I did build the similar models in ahdl. But as you may know, the models are just rough estimates of the real circuits, and most likely you cannot include all of the poles/zeros in the models. Eventually you need to verify the stability in the REAL circuits.

Any comments on how to verify the stability of such loops with non-linear circuits in simulation?

Thanks.

Ruritania wrote on May 3^rd, 2010, 8:16am:


What do you mean with "real circuits" ? Measurements rather than simulation?  For my opinion, only dominant poles/zeros are important for stability checks.

Ruritania wrote on May 3^rd, 2010, 8:36am:
I don't know.
Expect answer from Cadence guys.

Ruritania wrote on May 3^rd, 2010, 8:45am:


Of course, simulation can give you only a - more or less - rough estimate concerning circuit behaviour. But - that's a lot!
And, of course, you have to verify the results based on "real circuits". In particular, when you have simulated a linear model of a non-linear circuit. However, certain parameters (e.g. stability margins) are defined for linear systems only.

love_analog wrote on May 18^th, 2010, 9:49pm:


It is defined in my first posting May 1st.