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Phase Noise of Δ-Σ modulators (Read 1000 times)
Mayank
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Phase Noise of Δ-Σ modulators
Jun 14th, 2010, 9:13pm
 

   I have read many papers on ΔΣ modulator design & they depict phase noise plots for 2nd, 3rd & 4th order modulation.
   How do they obtain those phase noise plots for ΔΣ modulators ?
   Solely through MATLAB models or from SPICE simulation ??



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ipyd
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Re: Phase Noise of Δ-Σ modulators
Reply #1 - Jun 15th, 2010, 5:52am
 
Hi Mayank,

I've never done it before. But, I guess, they save all simulation SPICE results and then plot it using MATLAB code.
I know it's not related, but you may go to : http://cmosedu.com/cmos2/MSD_Matlab/MSD_MATLAB.htm
as reference..

Sorry, i can not help you much.
--ipyd
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #2 - Jun 15th, 2010, 6:13am
 
Mayank wrote on Jun 14th, 2010, 9:13pm:
How do they obtain those phase noise plots for ΔΣ modulators ?
Solely through MATLAB models or from SPICE simulation ??
If your main interest is a noise shaping characteristics of  ΔΣ modulator, use Signal Flow Model Simulator such as
   Mathworks Simulink
   Agilent Ptolemy
   Agilent SystemVue

Or use Event-Driven Simulators such as
   Cadence NCSim
   Synopsys VCS


If your interest is a characteristics of whole ΔΣ Fractional-N synthesizer including VCO,
use Berkeley Design Automation AFS Transient Noise Analysis.

See the followings.
http://www.designers-guide.org/Forum/YaBB.pl?num=1238242506
http://www.designers-guide.org/Forum/YaBB.pl?num=1259714206/2#2
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« Last Edit: Jun 16th, 2010, 5:59am by pancho_hideboo »  
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Mayank
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Re: Phase Noise of Δ-Σ modulators
Reply #3 - Jun 16th, 2010, 3:21am
 
I want to obtain Output Spectrum of a first order  Δ-Σ modulator with & without dither.

If you can refer to the following paper availabe on ieeexplore ---

Reduced complexity 1-bit high order digital delta-sigma modulator for low voltage fractional-N synthesis applications
By -- B. Bornoosh, A. Afzali-Kusha, R. Dehghani, M. Mehrara, S.M. Atarodi & M. Nourani

I am trying to obtain the plot (from the paper ) that i am attaching with this post.
How do i get this ?
If someone can help pls.
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SDM_output_Spectrum.JPG
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sheldon
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Re: Phase Noise of Δ-Σ modulators
Reply #4 - Jun 16th, 2010, 5:34am
 
Mayank,

   Does page 45 provide the measurement you are looking for?

http://www.designers-guide.org/Analysis/PLLnoise+jitter.pdf

                                                            Best Regards,

                                                              Sheldon
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #5 - Jun 16th, 2010, 5:46am
 
Mayank wrote on Jun 16th, 2010, 3:21am:
I am trying to obtain the plot (from the paper) that i am attaching with this post.
How do i get this ?
If your interest is a post processing of data, see the followings.
http://www.designers-guide.org/Forum/YaBB.pl?num=1213204643
http://www.designers-guide.org/Forum/YaBB.pl?num=1245144421
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sheldon
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Re: Phase Noise of Δ-Σ modulators
Reply #6 - Jun 16th, 2010, 6:17am
 
One should not simply apply an FFT to the output signal of the VCO/FDN
to determine L(Δf ) for the PLL. The result would be quite inaccurate
because the FFT samples the waveform at evenly spaced points, and so
misses the jitter of the transitions.
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sheldon
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Re: Phase Noise of Δ-Σ modulators
Reply #7 - Jun 16th, 2010, 6:18am
 
Sorry,

   See page 44.

                    Best Regards,

                       Sheldon
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #8 - Jun 16th, 2010, 6:55am
 
Quote:
One should not simply apply an FFT to the output signal of the VCO/FDN to determine L(Δf) for the PLL.
The result would be quite inaccurate because the FFT samples the waveform at evenly spaced points,
and so misses the jitter of the transitions.
Instead, L(Δf) can be measured with Spectre’s Fourier Analyzer,
which uses a unique algorithm that does accurately resolve the jitter [16].
However, it is slow if many frequencies are needed and so is not well suited to this application.
This is no more than an advertisement of Fourier Integral Calculation in Cadence Spectre.
And it is not proper in general.

If sampling time step is enough small, we can never miss jitter.
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« Last Edit: Jun 16th, 2010, 8:35am by pancho_hideboo »  
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sheldon
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Re: Phase Noise of Δ-Σ modulators
Reply #9 - Jun 16th, 2010, 7:14am
 
Pancho,

  Actually it is not, read the next page, page 45, and will see that an
alternate approach is recommended. By saving the periods you can
apply the PSD. BTW, the problem is not the simulator time steps, it
is the resolution of the FFT. The number of FFT samples required to
capture the jitter is extremely high so it is not an efficient tool for
this problem.

                                                              Best Regards,

                                                                  Sheldon
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #10 - Jun 16th, 2010, 7:19am
 
sheldon wrote on Jun 16th, 2010, 7:14am:
Actually it is not
Very not correct.

sheldon wrote on Jun 16th, 2010, 7:14am:
read the next page, page 45, and will see that an alternate approach is recommended.
By saving the periods you can apply the PSD.
Again you are wrong. You are very missing point and don't understand point.

You refered L(Δf) in your append : http://www.designers-guide.org/Forum/YaBB.pl?num=1276575200/6#6
On the other hand, this is an evaluation of Sφ(Δf) based on well-known Spectrum Estimation Technique which is useful for getting small frequency resolution with small number of samples.
Here evenly spaced time step samples can be used.
http://www.designers-guide.org/Forum/YaBB.pl?num=1242749411

Statements which you refered regarding evaluation of L(Δf) are similar to old day's claim regarding advantage of Shooting Newton of Cadence Spectre compared to HB analysis.

Small frequency resolution requires very long capturing time.
On the other hand, we have to make time step very small so we can not miss jitter.

So if time steps are evenly spaced even for period where jitters are not included,
it is not efficient regarding total time points.
This is a claim of Fourier Integral Calculation in Cadence Spectre.

sheldon wrote on Jun 16th, 2010, 7:14am:
The number of FFT samples required to capture the jitter is extremely high
so it is not an efficient tool for this problem.
But FFT of evenly spaced time step sampling data is used in actual instruments.
And it is very practical and useful level.

I can set RBW(Resolution Band Width) 1Hz in my Real Time Spectrum Analyzer based on FFT with practical sweep time.


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« Last Edit: Jun 17th, 2010, 1:39am by pancho_hideboo »  
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Mayank
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Re: Phase Noise of Δ-Σ modulators
Reply #11 - Jun 16th, 2010, 9:19pm
 
Guys Guys Guys,

We digress.....

I am not interested in Post-Processing of waveforms. I am well aware how to do that either in MATLAB or in Cadence ADE or wotever.

I wanted to know how to setup a Test-Bench around my Δ-Σ modulator model in MATLAB to obtain this output spectrum plot. can this be done in MATLAB ?

Is this waveform the output of a Fractional PLL in which SDM is applied because SDM just produces output Division factors.
How do i obtain a FFT of a signal from that ??
Which signal is this plot indicative of ?

@ Sheldon : I am aware of this concept that Cadence quotes in its ANs.

& Pancho is right. Page 45 is referring to Sphi, not Lphi calculation.

But pls. address my queries above. We will discuss the FFT funda on a simulator forum later.
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #12 - Jun 17th, 2010, 1:41am
 
Mayank wrote on Jun 16th, 2010, 9:19pm:
@ Sheldon : I am aware of this concept that Cadence quotes in its ANs.
& Pancho is right. Page 45 is referring to Sphi, not Lphi calculation
No, you don't understand my append correctly.

This is no more than an advertisement of Fourier Integral Calculation in Cadence Spectre.
And it is not proper in general.
If sampling time step is enough small, we can never miss jitter.

Mayank wrote on Jun 16th, 2010, 9:19pm:
I wanted to know how to setup a Test-Bench around my Δ-Σ modulator model in MATLAB to obtain this output spectrum plot.
can this be done in MATLAB ?
I use Mathworks Simulink, although it is possible by using Mathworks MATLAB.

Mayank wrote on Jun 16th, 2010, 9:19pm:
Is this waveform the output of a Fractional PLL in which SDM is applied because SDM just produces output Division factors.
Yes.
See Figure-3 of http://www.designers-guide.org/Forum/YaBB.pl?num=1213204643/4#4
But DSM is modeled by MATLAB not Simulink here.

I recommd you use Simulink not MATLAB.
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Mayank
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Re: Phase Noise of Δ-Σ modulators
Reply #13 - Jun 17th, 2010, 3:03am
 
Quote:
This is no more than an advertisement of Fourier Integral Calculation in Cadence Spectre.
And it is not proper in general.
If sampling time step is enough small, we can never miss jitter.
Pancho, could you please explain this point in detail.
THAT If the sampling time is small enough, even though different than transition points, how can we not miss jitter in FFT ??
It would be helpful, coz i think this point is going unexplained & misunderstood through past few posts.

Quote:
See Figure-3 of http://www.designers-guide.org/Forum/YaBB.pl?num=1213204643/4#4
But DSM is modeled by MATLAB not Simulink here.
This was helpful.

Quote:
I recommd you use Simulink not MATLAB.
Roger that.


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Mayank
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pancho_hideboo
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Re: Phase Noise of Δ-Σ modulators
Reply #14 - Jun 17th, 2010, 3:09am
 
Mayank wrote on Jun 17th, 2010, 3:03am:
THAT If the sampling time is small enough, even though different than transition points, how can we not miss jitter in FFT ??
In general, we know time resolution of generated jitters.
So if we use fixed time step solver in signal flow model simulator,
we have to set analysis time step lesser than time resolution of jitter.
In this case, FFT of many points are invoked.

Mathworks Simulink have both continuous and fixed time step solvers.
If you use continuous time solver in Mathworks Simulink,
you can use Mathworks MATLAB function to evaluate spectrum for data in "Workspace".

Mayank wrote on Jun 17th, 2010, 3:03am:
Quote:
See Figure-3 of http://www.designers-guide.org/Forum/YaBB.pl?num=1213204643/4#4
But DSM is modeled by MATLAB not Simulink here.
This was helpful.
This is not DSM for Fractional-N Synthesizer.

I can't find proper example of typical 3-cascaded-MASH-DSM for Fractional-N Synthesizer now.
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