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Doubt abt PLL Jitter from PLLnoise+jitter Paper (Read 1538 times)
Mayank
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Doubt abt PLL Jitter from PLLnoise+jitter Paper
Jun 24th, 2010, 10:27pm
 
Hi,
Ken, i wanted to ask one doubt from your PLLnoise+jitter Paper.

Page 34 of 51. Section 11. Jitter of a PLL. Figure 15

The Graph you depict where your indicate the regions of Accumulating Jitter from VCO, Synchronous Jitter from PFD/CP, FDs, & the again Accumulating Jitter from OSC. This Graph shows an ever increasing Jitter as we increase our Observation Time in terms of no. of cycles from a matched reference & feedback transition or what i think it is - Tracking Jitter.

This Graph is for an Open Loop Functioning, Right ??
Otherwise in Closed Loop Operation, PLL will correct the Jitter & limit it within bounds. Am i correct ??

--
Mayank.
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Ken Kundert
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Re: Doubt abt PLL Jitter from PLLnoise+jitter Paper
Reply #1 - Jun 24th, 2010, 10:41pm
 
yes.
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