Dear all,

I'm currently measuring and debugging a CMOS temperature sensor with a required accuracy of +/- 2degC. It is based on sampling a PTAT voltage, generated from the difference between the base-emitter voltages of 2 bipolar transistors.

I notice two things in measurement: a huge static offset (easily 10degC...20degC) + some parabolic/linear error trend.

I can explain the static offset (offset on the PTAT voltage) + the linear error trend (wrong estimate/variation on the tempco). Does anyone know where the parabolic error trend could originate? It is not the parabolic curve of VBE typically, since the PTAT voltage does not contain a VBE term...

Furthermore, I've seen that knowing the tempco pretty accurate is crucial for obtaining accurate results.

Therefore, I'm coming to the conclusion that you always require calibration for these temperature sensors:

1. At e..g room temperature (offset)
2. At another temperature to estimate the tempco

I also read this a lot in datasheets.

Can anyone with a lot of experience on (CMOS) temperature sensors comment on this? Do you typically require calibration? How much?

Regards

Dear Mayank,

In simulation, the 2nd order tempco of the resistors is not the cause (unless they are badly modeled). Besides, VPTAT ~ kT/q*log(M)*R2/R1...I would guess the tempco of the resistors cancel.

By 'how much' calibration I mean:

1. Only offset calibration @room temperature
or
2. Offset calibration + some calibration/fit over temperature to obtain an accurate estimate of the tempco

Regards

Dear Rob,

Thanks for your suggestions.

In your experience, are those effects typically well modeled, meaning
you can observe them in simulation?

Regards

Visjnoe wrote on Jul 6^th, 2010, 11:33pm:

Tz got it right imo... hard to see in simulation unless you go looking for them, but there are things you can do to test some things. Noise gets coupled in through parasitic caps, and the caps on the bipolar should be modeled. Run a transient simulation with noise of varying frequencies on the supplies and substrate and see how much it takes to shift the voltage. I guess you could also change the clock frequency and see if it affects the measured results...

The base resistance should be modeled, but bipolars aren't easy to model. Base resistance is also dependent on layout so if you didn't use exactly the same layout it can be different. You can get a feel for how close you are by increasing the current and seeing if it affects the curve. generally it is a problem if your bipolars are biased too high and will be worse at cold. You can also have problems if they are biased too low, but the problems kick in a higher temps and shouldn't cause differences at room temperature.

I forgot to mention the startup circuit if you use one. It might not be turning off.

There are so many things that can go wrong with PTAT circuits it is hard to guess without seeing the results and the circuit. They are circuits that teach you about what can go wrong. Are the results random around zero? Probably mismatch. Is opamp offset important? Opamp offset drift might be as much as 10uV/C, but it should have a mean of zero. Offset from the bipolars should be very small, but I don't know how big your PTAT voltage is to begin with. Any current density ratio less than 8 is an automatic do-over because the signal is very small .

Package stress is a problem with plastic, but not ceramic. Suspect package stress if it is different each time you cycle the temperature.

Are there circuits on-board that change the on-board temp? Especially if they create a temperature gradient.

Is the nonlinearity worse at hot or cold? What do you mean by a "linear error trend?"

So many things... Those are just the obvious ones. If you put up your circuit we can see if there is an obvious gotcha.

I need to think about your numbers, but it sounds like something non-linear kicks above 0C, which is lower than I'd expect if it was leakage unless it is coming from a startup circuit. Is the parabola concave up? How much is it off by? The larger PTAT voltage across the range also sounds like a startup circuit, but it is really hard to guess. You might be able to test the startup theory by using a lower supply.

What do you mean by the temp-co of the silicon? With a PTAT all the temp-cos should cancel if they are matched (look at your equation: no temp-co). I assume by linear error you mean that the slope is steeper than it should be -- one way that can happen is if R2/R1 is grossly mismatched (unlikely) or you have current leaking in from somewhere (like a startup circuit). I believe there is a "non-ideality factor" "n" in front of your equation. That could give a small error, but think you are seeing about a 3% error so that is pretty large.

Are you using Nwell resistors? The volt co can cause an error.

I would not suspect mismatch between the bipolars unless you have a really bad layout. E.G. XTI won't mismatch much between devices. Base resistance is different because you will have 8x the current drop across one of the devices. Temperature and stress differences of course cause errors too.

It sounds like you have a good design. You might have a tough one to solve.

Regarding the supply... If your startup circuit is causing problems you might be able to change the behavior of the startup circuit by using different supplies. I also once saw a problem where hot electron effects were causing leakage.