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loose-electron

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Re: Minimize offset voltage at inputs of comparator.. help needed
Reply #15 - Jul 24^th, 2010, 11:08am

Lex wrote on Jul 23^rd, 2010, 12:18am:

May I ask why analog techniques are not good enough to get to 1mV offset?

What you got going on here is 5 different people
saying you can use 5 different methods to do the same thing.

That said - there are multiple ways to get this done.

Geometry scaling (big devices and better matching) will only work up to a point. You need the specific matching data for the foundry process to tell you if this is viable.

The 16X increase to get better matching is an academic perception that is not valid, because it is based upon a number of older papers that are no longer valid at smaller geometry.

Static offset compensation thru a digital adjustment works.
Dynamic compensation with capaciive offset cancellation works too.

The quick decision between the above two is whether or not its a clocked system. Sampled time systems lend themselves well to doing dynamic offset cancellation.

OP-amps make poor comparators. You are gain-BW response limiting the device so it can work inside a feedback loop. Not needed in a comparator.

As for the signal you need to respond to? Sounds like you need more gain in the system.

There are lots of papers and books out there on this subject.
Time to do some research.

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kanu

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Re: Minimize offset voltage at inputs of comparator.. help needed
Reply #16 - Jul 24^th, 2010, 1:25pm

Hi loose-electron,

Thanks for your reply. This makes picutre a little clearer for me.

First of all, my system is not a clocked one. So I think I will have to use dynamic offset cancellation technique.

Further, it may sound naive. But I am asking this just to confirm if I got everything right. I was wondering, as in an opamp basically compensation capacitor is used to make it stable for high frequency operation (and such that it works in feedback loop)... so why not I just use bias circuit + differential amplifier + common source + push pull amplifier to make my comparator ? Also, I plan to use capacitor for offset cancellation. Do you see any problem with this circuit (our aim is design a comapator which can just detect difference as low as 1mV) ?

Thanks,
Kanu

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love_analog Senior Member Offline Posts: 101	Re: Minimize offset voltage at inputs of comparator.. help needed Reply #17 - Jul 29^th, 2010, 6:58am Kanu I don't understand how you can say you are using cap for offset cancellation and also say that you don't have any clocks. I presume you are using cap to store the offset voltage in 1 phase of the clock and in the next phase you cancel that "stored" offset from the real signal.
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kanu

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Re: Minimize offset voltage at inputs of comparator.. help needed
Reply #18 - Jul 29^th, 2010, 7:22am

Hi love_analog,

My mistake.. I realized it after posting the above reply. Yes, right now as you said I am trying to implement autozeroing for offset calculation for 2-stage opamp design. But for some reasons it is not giving me expected output. So I just wanted to verify following doubts:

- Is unity gain stability necessary for autozero to work properly?
- What exactly tells me the speed of the circuit ? Is it slew rate or propagation delay ? I understand that slew rate gives the rate at which the load capacitor it being charged and discharged. I mean to ask which parameter, slew rate or propagation delay should be right measure for speed of a comparator circuit?

I appreciate everyone has been a lot of help to me on this thread. I am able to proceed till autozeroing because of this.

Thanks and Regards,
Kanu

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HdrChopper

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Re: Minimize offset voltage at inputs of comparator.. help needed
Reply #19 - Aug 4^th, 2010, 4:58am

Hi

kanu wrote on Jul 29^th, 2010, 7:22am:

- Is unity gain stability necessary for autozero to work properly?

Ususally YES. You have to set the amplifier in unity gain to measure and store the input (and output in this case) referred offset. To measure such offset you will need a stable opamp.

kanu wrote on Jul 29^th, 2010, 7:22am:

- What exactly tells me the speed of the circuit ? Is it slew rate or propagation delay ? I understand that slew rate gives the rate at which the load capacitor it being charged and discharged. I mean to ask which parameter, slew rate or propagation delay should be right measure for speed of a comparator circuit?

Both will contribute to the total response time of the circuit.

Best
Tosei

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raja.cedt Senior Fellow Offline Posts: 1516 Germany	Re: Minimize offset voltage at inputs of comparator.. help needed Reply #20 - Aug 4^th, 2010, 9:36pm hi kanu, adding to Tosei post not only unity gain stability but settling time is very important (it should settle with in sample period)
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Lex

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Re: Minimize offset voltage at inputs of comparator.. help needed
Reply #21 - Aug 5^th, 2010, 3:52am

raja.cedt wrote on Aug 4^th, 2010, 9:36pm:

hi kanu,

adding to Tosei post not only unity gain stability but settling time is very important (it should settle with in sample period)

Because of the unity gain, an amplifier is much faster than in normal operation. So I wouldn't expect settling time to be the limiting factor.

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HdrChopper

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Re: Minimize offset voltage at inputs of comparator.. help needed
Reply #22 - Aug 5^th, 2010, 6:00pm

Lex wrote on Aug 5^th, 2010, 3:52am:

Because of the unity gain, an amplifier is much faster than in normal operation. So I wouldn't expect settling time to be the limiting factor.

It is in fact important since if settling time is not enough, then stored offset value will not be the actual offset value of the amplifier and cancellation efficiency will be degraded.

Best
Tosei

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