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3rd order SDM stability (Read 2685 times)
neoflash
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3rd order SDM stability
Aug 24th, 2010, 8:19pm
 
I'm using Woogeun Rhee's 3rd order modulator for simulation. The block diagram is shown as attached.

The modulator is stable if I don't clamp the final quantizer output, i.e. let it change more than 8 levels, such as from +20 to -5.  It looks like that it is critical to let the quantizer give large output swing in initial stage to achieve stability.

However, it become unstable if I clamp the output of quantizer to true 8 levels, from 16 to 24. The modulator is not stable for input = 19.11.

I also found that the 3rd modulator's initial value could stabilize the modulator. If I set it very close to the final value, then it is stable. However, moderate deviation from this value will make the modulator unstable.

I would like to know that how can we stabilize it when still clamp the quantizer's output to true 8 levels?

Thanks.
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vivkr
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Re: 3rd order SDM stability
Reply #1 - Aug 26th, 2010, 12:10am
 
you obviously need to do some work on scaling the integrator states and get the quantizer input to come down so as not to overload your 8-level quantizer. if the quantizer input is too large (assuming a fixed number of levels), and the quantizer output is hard saturated at the limit, then your quantizer gain drops, pulling the loop into instability.

whatever reference you are using does not mention the dynamic range scaling and integrator state limiting that was performed on the modulator.

regards,
Vivek
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neoflash
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Re: 3rd order SDM stability
Reply #2 - Aug 26th, 2010, 1:20am
 
That's a very helpful input. Matches what I observed through time domain sim well. Thanks.

Do u think that I can limit the integrator so that the summed result appearing as the quantizer input doesn't overload? Can this solve the problem completely?

I found that doing two things can help improve stability:

1. reduce integrator output range.
2. increase quantizer range.

But still want to know the systematic way to design a unconditional stable modulator. ( both in linear sense and in non-linear sense.)

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vivkr
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Re: 3rd order SDM stability
Reply #3 - Aug 26th, 2010, 11:54pm
 
Well, you don't really have any other options, do you? Scaling integrator levels is a necessary step in the design of any filter, and you want to do this to
(a) limit the swings of the various integrators to a reasonable level
(b) make the swings somewhat similar, e.g. not that Int1 swings from -1 to +1 and Int3 from -1000 to +1000, which might easily happen without
dynamic range scaling.

in addition, you want to add some saturation in there. the common practice is to set saturation levels so that the integrators later in the chain saturate slightly earlier when using a CIFF topology. Once this is done, the quantizer input swing is automatically defined, and you can decide what number of quantizer levels you need.

The common practice though is to first decide on the number of quantizer levels you can afford to have, and then perform the scaling so that you do not overload your quantizer.

If you want to know more, you will need to read up some books, e.g. "Understanding Delta-Sigma Converters" by Schreier & Temes, or the yellow book by Norsworthy, Schreier and Temes, both free for download at IEEE Xplore under "Books" if you are an IEEE member.

Vivek
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