.matteo
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Posts: 51
Padova, Italy
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hi everybody,
I'm designing an active single-ended to differential converter.
I designed a resistively loaded fully differential couple with a 50ohm resistor between the gates of the two transistor to match with the measurement equipment. This couple is followed by another fulldiff couple to remove the common mode signal.
However, I've not enough rejection to the common mode signal and my plus and minus signal are very different in amplitude (and phase) at the output of the first couple and they get worse at the end of the second one. :-/
Does anybody has any suggestion about it? or a pointer to some article?
thanks
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