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PAE obtained from PSS simulation exceeds 150 % - How come ? (Read 6139 times)
DoYouLinux
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PAE obtained from PSS simulation exceeds 150 % - How come ?
Sep 22nd, 2010, 4:30am
 
Hi all,

I am simulating just an output stage of a PA using SpectreRF. The transistor drives a port adapter representing an optimum output load.
When I ran PSS and plotted PAE, I noticed that the PAE has no peak (it increases without going down) even input amplitude is 1 Vpeak. Also the PAE exceeds 150 % !!!! I biased the transistor in class A.

How does this happen ? I also tried to calculate PAE using

PAE = (Pout_rms - Pin_rms)/Pdc * 100%.

From this formula, the PAE has a peak PAE which is at 55 %. Pdc I used is static Pdc (obtained from DC simulation).

I really want to understand how SpectreRF calculate PAE. I tried to read the user's guide, but there is no definition about this.

Please suggest  ;)

DYL
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pancho_hideboo
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Re: PAE obtained from PSS simulation exceeds 150 % - How come ?
Reply #1 - Sep 22nd, 2010, 7:13am
 
DoYouLinux wrote on Sep 22nd, 2010, 4:30am:
How does this happen ? I also tried to calculate PAE using
PAE = (Pout_rms - Pin_rms)/Pdc * 100%.
From this formula, the PAE has a peak PAE which is at 55 %.
Pdc I used is static Pdc (obtained from DC simulation).
Not Correct.
You have to use DC solution of PSS analysis, that is, solution for "harm=0".

If you see analysis examples of PA in Agilent ADS, you can learn correct equations for characterization of PA.

The followings are general notes for you.

- Always describe correct tool's name and vendor's name which you use as tool or simulator.
- Don't do multiple posts which are same content.
- Don't request source code or behavioral model without any efforts.
- There are many simulators which have analyses called as PSS, PAC and Pnoise.
- Describe in detail with using correct terminologies.
- Warnigns are different from Errors.
- ADS is not name of simulator.
- There is no tool which name is Cadence.
- Don't use Direct Plot of Cadence ADE blindly without knowing definition.
- All gains in Direct Plot of Cadence ADE are "right", "true" and "practical" voltage gain.
- Don't mix up Simulation with Post Processing. They are completely different phase.
- MATLAB are different from Simulink.
- Learn measurements using actual instruments. Not "EDA Tool Play
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DoYouLinux
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Re: PAE obtained from PSS simulation exceeds 150 % - How come ?
Reply #2 - Sep 22nd, 2010, 8:28am
 
Hi pancho_hideboo,

Thank you very much for your suggestion. I will try to calculate the PAE again.

Using harm=0 for calculating Pdc makes more sense, because otherwise class C stage should have infinite PAE if Pdc is from DC simulation.

By the way, I really love your general notes Smiley

You are always a great sensei,

DYL
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DoYouLinux
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Re: PAE obtained from PSS simulation exceeds 150 % - How come ?
Reply #3 - Sep 22nd, 2010, 11:39pm
 
But, wait ....

Even I follow the step to evaluate PAE in Direct Plot form of ADE (probing the output node, the input node, and the supply voltage node), I still got PAE greater than 150 %.  >:(

That's why I am wondering about how PAE is evaluated in SpectreRF.

Anything wrong in the calculation of PAE in SpectreRF ????

DYL
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pancho_hideboo
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Re: PAE obtained from PSS simulation exceeds 150 % - How come ?
Reply #4 - Sep 23rd, 2010, 8:52am
 
You had better never trust Direct Plot of Cadence ADE.
I recommend you not to use Direct Plot of Cadence ADE.

Define your own equations even in Cadence Post Processing Environment for Cadence Spectre.
As you know, we define our own equations in Agilent ADS Post Processing Environment.

DoYouLinux wrote on Sep 22nd, 2010, 11:39pm:
Even I follow the step to evaluate PAE in Direct Plot form of ADE
(probing the output node, the input node, and the supply voltage node),
I still got PAE greater than 150 %.  >:(
That's why I am wondering about how PAE is evaluated in SpectreRF.
Anything wrong in the calculation of PAE in SpectreRF ????
It has no relation to Cadence Spectre.

Calculating PAE is a task in Cadence Post Processing Environment not Cadence Spectre.
See http://www.designers-guide.org/Forum/YaBB.pl?num=1264511244/3#3

Activate "Add to Outputs". Then save it as OCEAN Scripts.
Show me the followings.
   - Spectre Netlist regarding Analysis Statements and Signal Source definitions.
   - Ocean Scripts including equation for calculating PAE.

The followings are general notes for you.

- Always describe correct tool's name and vendor's name which you use as tool or simulator.
- Don't do multiple posts which are same content.
- Don't request source code or behavioral model without any efforts.
- There are many simulators which have analyses called as PSS, PAC and Pnoise.
- Describe in detail with using correct terminologies.
- Warnigns are different from Errors.
- ADS is not name of simulator.
- There is no tool which name is Cadence.
- Don't use Direct Plot of Cadence ADE blindly without knowing definition.
- All gains in Direct Plot of Cadence ADE are "right", "true" and "practical" voltage gain.
- Don't mix up Simulation with Post Processing. They are completely different phase.
- MATLAB are different from Simulink.
- Learn measurements using actual instruments. Not "EDA Tool Play
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DoYouLinux
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Re: PAE obtained from PSS simulation exceeds 150 % - How come ?
Reply #5 - Nov 25th, 2010, 11:59pm
 
Hi pancho_hideboo,

Sorry for very late feedback. I have found the reason of this issue. As seen in the attached picture, the matching network uses ideal components.

The input power probed at the input port (node 1, Pin1) is equal in magnitude compared to the input power probed at the gate (node 2, Pin2). However, the sign of Pin1 is negative and that of Pin2 is positive.

If the PAE uses Pin2 as the input power, PAE will exceed 100 %. If the PAE uses Pin1 as the input power, PAE will not exceed 100 % and has a peak value somewhere.

I think the PAE function of the Direct Plot form takes the sign of the input power into its calculation. That's why it does not allow the input power to be positive.

However, thank you a lot for your fruitful suggestions,

DYL
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