Hi,


thanks for the reply. Just for the record, I mean to generate sin(ωt)and ±cos(ωt) and upconvert the IQ to RF rather than generate sin(ωt +ω_IFt) and upconvert it. What kind of image-rejection do you think is possible? I have not touched on transmitter design before, but based on the receiver deisgn i've studied, I suppose an image rejection of 30 dB is possible. Is this not true? For MSK, I think the SNR requirement for proper demodulation is probably around 10 dB, so 30 dB IRR should be sufficient. Please correct me if i'm wrong.


thanks,
Aaron

Hi Aaron,

Quote:


What are the additional requirements for a PLL that uses direct VCO modulation that would not be needed for your scheme that you detailed above?

ps. you are quoting some replies but all i can see are your posts in this thread. Are you quoting from some other discussion?

Hi Aaron,

Quote:


What is your datarate? With your scheme, assuming a SNR of 20 db is required, all you need to have is 20 db of image rejection - is that the image rejection you are specifying for your design?

hi aaron,

just tried to read this topic... and am quite confused as its gets really cryptic when a load of the posts going missing....

anyway the most simple way to do this MSK transmitter (and what looks like you are talking about in your original post) is by an IQ modulator (SSB upconverter). The VCO in this case only need to be a CW LO signal (locked by standard PLL at the carrier freq), although you need a quadrature LO for the IQ modulator. The quadrature (hilbert transform) can be divide by 2 if the VCO is at 2*freqtx, or by polyphase filter or by quadrature VCO.
The baseband IQ representing your 2Mchip/s MSK can be generated by a digital modulator followed by a DAC to get the ±500kHz analog IQ signals.
The "image" rejection depends on your IQ phase and amplitude mismatches in both LO IQ path and baseband IQ paths... 20dB is pretty easy to meet though..
The quality of the transmission will be degraded by the finite "image rejection" and for that matter the carrier suppression (caused by DC offsets) and other spurious tones (due to crosstalk and non-linearity etc.) in the IQ modulator, but the limiting factor i think for the quality of the MSK transmission will be be noise of the final signal caused by PLL jitter (with additonal noise/error due to IQ modulator, PA, DAC etc.)

The MSK transmitter can be also be implemented using a loop modulator... i guess these are the architectures you are referring to when you say "direct VCO modulation". They use a fractional-N PLL in which the data modulation is applied to the feedback divider via a delta-sigma modulator, with the channel number. For PLL BW must be wide enough to follow the modulation, which causes a problem due to the PLL integrated noise will be high due to the wide BW. The get-out here is to use two-point modulation.... Anyway the advantage of the loop modulator techniques is that it can be lower power (no need for quadrature LO or IQ modulator), but is as you say its a bit more "complicated" as an architecture compared to standard IQ modulator approach.

cheers

aw