ontheverge
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Hi,
if a single stage folded cascade OTA is used in switch capacitor circuit, the 2nd pole would be at the source of cascade stage (both PMOS and NMOS), to estimate this pole, i tried to use f=1/2*pi/(R*C), i figure the resistance is roughly 1/gm, however, the capacitance expression is messy, Cgs of cascade stage of course, but there are also bunch of cds and cgd, so how to include these parameters into design in a feasible way to satisfy target 2nd pole?
thanks,
Steve
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