Hello Community

I try to netlist my top level analog design( top down methodology) by using AMS designer.

When I netlist and after I compil and elaborate my netlist with irun -c, specially the verilogams models contain only wreal ports, so I Can use irun -c, I got these kind of errors:
RX_MIX_EN ), .IBIAS_7U2( { hbias_7u2[1:0],hbias_7u2[3] } ), .OUTQ_P(
                        |
ncelab: *E,CUVIRP (./gsm_top_01_20101111a.vams,3926|25): Incompatible real port connection at gsm_top_01.I2.IRX_MIX_EN ), .IBIAS_7U2( { hbias_7u2[1:0],hbias_7u2[3] } ), .OUTQ_P(
                        |
ncelab: *E,CUVIRP (./gsm_top_01_20101111a.vams,3926|25): Incompatible real port connection at gsm_top_01.Iirun: *E,ELBERR: Error during elaboration (status 1), exiting.


hbias_7u2[1:0],hbias_7u2[3] are wreal ports, it seems if I undersand we cannot have concatenation of wreal which is also linked to the fact we cannot have concatenation of reals in vams, the errors diseapears when I use for example .IBIAS_7U2(  hbias_7u2[2:0] ), is this normal that wreal cannot been concatenated or my errors are linked to something else.
Thank you very much
Idris