The Designer's Guide Community
Forum
ForumVerilog-AMSAnalysisModelingDesignTheory
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Jul 16th, 2024, 8:57am
 
  HomeHelpSearchLoginRegisterPM to admin    
The Designer's Guide Community Forum › Modeling › Behavioral Models › Debugger for VerilogA
‹ Previous topic | Next topic ›
Pages: 1
Send Topic Print
Debugger for VerilogA (Read 3918 times)
SAM_K
New Member
*
Offline



Posts: 2
Debugger for VerilogA
Nov 25th, 2010, 3:06am  
Hi

I'm facing a few convergence issues when I simulate my verilogA code with eldo. Is there any debugger for VerilogA. It would be really helpful to me to know exactly whats wrong

Thanks
Back to top
 
 
View Profile   IP Logged
Geoffrey_Coram
Senior Fellow
******
Offline



Posts: 1999
Massachusetts, USA
Re: Debugger for VerilogA
Reply #1 - Dec 1st, 2010, 8:24am  
I find it useful to use the $debug system task, which should print on every iteration.  I don't know of any interactive debuggers.
Back to top
 
 
If at first you do succeed, STOP, raise your standards, and stop wasting your time.
View Profile WWW   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2386
Silicon Valley
Re: Debugger for VerilogA
Reply #2 - Dec 1st, 2010, 10:14am  
I know that Cadence used to provide an interactive Verilog-A compiler. I never became very popular and I do not know if it is still available.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
‹ Previous topic | Next topic ›
« Home ‹ Board
The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.