Hello all,

I'm working on a circuit that is quite simple when studied in schematics and in transient simulation, but the difficulty comes when I want to extract its transfert function.
The basis and my objectives are similar to the basic circuit described in the document "Simulating Switched-Capacitor Filters with SpectreRF" ( http://www.designers-guide.org/Analysis/sc-filters.pdf ). I have a perfect current sine signal, chopped by switches driven by clocks. This chopped current integrates into a capacitor. After a time the voltage of the signal is taken as a sample, and then the capa is reset by closing a switch on both nodes of the capacitor. The global length of this pattern is Ts. Then all this pattern restart for a new cycle. So all the behaviour is periodic of period Ts, and the output samples are taken at frequency Fs.
This circuit is doing a bandpass filtering and a subsampling function.
The clocks that are chopping the current are some custom clock sources with a global period Ts. (vpwlf sources)
All this circuit can be called a "bandpass filtering integration subsampler" (BFIS).
I want to measure the transfert function of the filtering function of my circuit, so i have the same issues as described in the aforementioned document. Spectre RF seems a good solution. But my questions are :
1) Is it possible to run a PSS and a PAC simulation with a periodic clock, but different from the standard (50% duty cycle) clock ? (For example in my case during the Ts lenght the clock is switching many times betweed Vdd and 0). If yes, which parameters do I have to set in this command clock ?
2) Is it possible to run a PSS and a PAC simulation with several command clocks driving several parts of the circuit. With the same global period Ts but with different behavours during this time ? (For example a chopping clock at hight frequency + a reset clock only at Vdd during one short time in the whole Ts time) ?

In order to maybe help the understanding of my circuit I attached a capture of the simplified scheme, and here just below the corresponding netlist.
Thanks in advance for your help


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// Library name: test
// Cell name: lnta_ideal_cleaned
// View name: schematic
subckt lnta_ideal_cleaned LNTAn LNTAp RFin Vcm inh_gnd inh_gnds inh_vdds
   G0 (inh_gnd LNTAp RFin inh_gnd) vccs gm=80m
   G1 (inh_gnd LNTAn RFin inh_gnd) vccs gm=-80m
   R3 (Vcm LNTAp) resistor r=10G
   R4 (LNTAn Vcm) resistor r=10G
ends lnta_ideal_cleaned
// End of subcircuit definition.

// Library name: test
// Cell name: Simple_BFIS
// View name: schematic
W14 (net109 Vintp CMDcn 0) relay vt1=300.0m vt2=1 ropen=RoffC rclosed=RonC
W15 (net109 Vintn CMDcp 0) relay vt1=300.0m vt2=1 ropen=RoffC rclosed=RonC
W5 (Vintn Vcm CMDr 0) relay vt1=300.0m vt2=1 ropen=RoffR rclosed=RonR
W13 (net110 Vintn CMDcn 0) relay vt1=300.0m vt2=1 ropen=RoffC rclosed=RonC
W12 (Vcm Vintp CMDr 0) relay vt1=300.0m vt2=1 ropen=RoffR rclosed=RonR
SWcp1 (net110 Vintp CMDcp 0) relay vt1=300.0m vt2=1 ropen=RoffC \
       rclosed=RonC
V3 (CMDr 0) vsource type=pulse val0=0 val1=1.2 period=1/Fs \
       delay=1/Fs/Ndiv*(Ndiv-2) rise=1/Fs/Ndiv/10 fall=1/Fs/Ndiv/10 \
       width=1/Fs/Ndiv
V10 (0 gnd) vsource dc=0 type=dc
V11 (vdd! gnd) vsource dc=1.2 type=dc
V15 (Vcm gnd) vsource dc=600.00m type=dc
C0 (Vintp Vintn) capacitor c=600f
V0 (CMDcn 0) vsource file="pwlFile_CLKcn" fundname="Fs" type=pwl \
       pwlperiod=1/Fs
V13 (CMDcp 0) vsource file="pwlFile_CLKcp" fundname="Fs" type=pwl \
       pwlperiod=1/Fs
V2 (RFin gnd) vsource mag=Vin_amp type=sine ampl=Vin_amp freq=Fin
I63 (net109 net110 RFin Vcm 0 gnds! vdds!) lnta_ideal_cleaned
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Ok, thanks, I start the design !
Quote:
In my case the periodic output signal is donwnconverted in frequency, so its period is much longer than the fundamental period.
Do i need to choose the frequencies of my circuit so as the output period is a multiple of the fundamental period (sampling period) ? Or i don't care ?