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Andrew Beckett

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Re: achievable IIP3 for cmos passive mixer
Reply #15 - Jan 07^th, 2011, 10:22am

Maybe, although in general you'd expect that the IM3 curve would get closer to 3dB/dB for lower input powers, and maybe flatten due to numerical noise limits. I've certainly seen similar strange behaviour in passive mixers. This is something we've spent quite a bit of effort in trying to solve (by altering the models to see if that can help). Certainly the problem doesn't happen with psp models (if it's this issue).

What are your accuracy settings in the simulator (in particular errpreset and reltol) - in fact might be easiest just to post the section at the top of the RF analysis which lists the "important" settings?

Regards,

Andrew.

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kelly

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Re: achievable IIP3 for cmos passive mixer
Reply #16 - Jan 7^th, 2011, 12:11pm

Hi Andrew,

these are my setttings,
in the analog option
reltol =1e-6, vabstol=1e-10, iabstol=1e-12, the rest is default
in the qpss,
shooting
conservative

I did find out that in the case when I tied the bulk to source, there are times that the source(bulk) to gate is forward biased by a 1V when Prf =11dBm.

But do you think my 1st IIP3 plot also looks funny too?

In your design, do you tied the bulk to source or you usually just let it at ground?

Thanks.
Kelly

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rfidea

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Re: achievable IIP3 for cmos passive mixer
Reply #17 - Jan 7^th, 2011, 12:29pm

Hi kelly!

I have followed this thread with interest for a while. As several people has pointed out there is a weakness in the BSIM models for this applications, that is when the signal swing passes Vds=0. I strongly advise you to check which model you are working with. You should not use the BSIM one. The PSP is a much better choice in this case. I do not think you ever will get a 3/1 dB slope with the BSIM model. If you simulate only the mixer transistors standalone and measure Id when sweeping Vds from negative to positive values you will see a discontinues in some of the derivities of the current.

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kelly Community Member Offline Posts: 67	Re: achievable IIP3 for cmos passive mixer Reply #18 - Jan 7^th, 2011, 1:06pm Thanks. I'll check on that.
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vp1953 Senior Member Offline Posts: 172	Re: achievable IIP3 for cmos passive mixer Reply #19 - Jan 7^th, 2011, 3:26pm Hi Kelly, should not the DSB NF be considered here ? - in this case the NF is very close to the CG. What is frequency for the NF and CG values?
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kelly Community Member Offline Posts: 67	Re: achievable IIP3 for cmos passive mixer Reply #20 - Jan 7^th, 2011, 7:35pm Hi Vp1953, aahh, because in the normal lossy network (where NF=loss), there is no noise folding from the image band, that's why we should compare DSB NF to the CG instead of the SSB NF? I measure both NF and CG at 200M since Flo and Frf are 1.8G and 2G, respectively. Thanks!
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kelly

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Re: achievable IIP3 for cmos passive mixer
Reply #21 - Jan 7^th, 2011, 8:03pm

Hi Ssahl,

I did check my model and you are right, I am using BSIM4. No one is aware of the non-leaniarity modeling issure aroubd vds=0. Doesn't seem like there is PSP model for now.......I guess I'll run the sim you suggested to see whether that still exists in the present model.

I have a questions then, assuming the P1dB sim is accurate (since it's just the fundemental tone), can I just estimate IIP3 be roughly P1dB+9.3 (something like that). I have noticed that in some passive mixer papers, they just quote the P1db simulation data instead IIP3. In another words, you often see the spectre IIP3 curve for active mixer papers, but rarely see that for the passive mixer ones.

Thanks.
Kelly

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aaron_do

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Re: achievable IIP3 for cmos passive mixer
Reply #22 - Jan 7^th, 2011, 9:53pm

Hi Kelly,

I don't think that you can simply add 9.3 dB to your P1dB. The assumption there is that 3rd order nonlinearity dominates the compression, but your third order nonlinearity is not correct. Also, for your mixer, you need to decide what kind of image rejection scheme you are going to use. If you are using filtering with a high IF, then SSB NF is correct. Otherwise you should use DSB NF, and in that case, the mismatch is only 1 dB. This could easily be due to other noise sources.

cheers,
Aaron

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kelly

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Re: achievable IIP3 for cmos passive mixer
Reply #23 - Jan 7^th, 2011, 10:20pm

Hi Aaron,

I remember you had an earlier post where you included a similar IIP3 plot like my 1st one. Did you ever resolve your problem at the low input level? Was it an accuracy thing or model? Also have you ever compared the qpss and qpac results with a two tones transient test? Do they match?

Can you explain what you mean by which NF to use depending on what image filtering scheme you have? Do you mean the filtering scheme in the real sysytem or as part of the simulation?

Thanks much!

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vp1953 Senior Member Offline Posts: 172	Re: achievable IIP3 for cmos passive mixer Reply #24 - Jan 8^th, 2011, 11:50am Hi Kelly, Quote: aahh, because in the normal lossy network (where NF=loss), there is no noise folding from the image band, that's why we should compare DSB NF to the CG instead of the SSB NF? Yes, thats what i was thinking.
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kelly Community Member Offline Posts: 67	Re: achievable IIP3 for cmos passive mixer Reply #25 - Jan 8^th, 2011, 10:31pm Hi vp1953, Is there any situation you will use SSB NF (to compare to CG) then? Thanks. Kelly
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kelly

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Re: achievable IIP3 for cmos passive mixer
Reply #26 - Jan 9^th, 2011, 1:23am

Hi all,

I think I finally understand (I hope) what you guys have been trying to tell me. Please see the IIP3 plot attached.

This is obtained by having the gate(LO), drain(IF) and source(RF) all biased at the same DC bias voltage, i.e. the drain/source are not biasd below the gate just below the threshold. Sure enough, you can clearly see the non-3db/db slope. My 1st IIP3 plot attached earlier (please see page 1), was obtained with the drain/source biased 400mV below the gate i.e., the devices are more on than the 0 bias case. I think that's why the problem of non-3db/db slope problem does not show up as prominantly as the one attached in this post.

I also obtain the same results using the harmonic balance method. Just as a reference, the model I am using is BSIM4(V4.5).

So I guess this pretty much conclude my IIP3 sim questions. By the way, the other simulations such as noise, s-parameters are still valid, as this modeling deficiency only affects the IM3 sim, right?

Please correct me if I am wrong, and thanks for all your patience.

Kelly

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ip3_vdelta_0.png

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aaron_do

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Re: achievable IIP3 for cmos passive mixer
Reply #27 - Jan 9^th, 2011, 6:17am

Hi Kelly,

I guess you already have your answer about the NF. In case you are using a high IF, your mixer is probably after an image reject filter. In this case SSB NF is valid since the image noise is filtered before it folds.

Oh yeah, in answer to your question about my previous post, I don't really remember which one you are referring to, but one of the times I asked it was due to the numerical accuracy of the simulator (hence use conservative setting), and the other time it was due to the asymmetric modeling of the BSim model. �

cheers,
Aaron

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« Last Edit: Jan 9^th, 2011, 11:19pm by aaron_do »

there is no energy in matter other than that received from the environment - Nikola Tesla

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vp1953 Senior Member Offline Posts: 172	Re: achievable IIP3 for cmos passive mixer Reply #28 - Jan 9^th, 2011, 1:53pm HI Kelly Quote: Is there any situation you will use SSB NF (to compare to CG) then? Yes, as stated by Aaron_do already.
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rfidea

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Re: achievable IIP3 for cmos passive mixer
Reply #29 - Jan 14^th, 2011, 9:57am

Hi kelly!

I was claiming in an earlier post that there is a discontinuty in the BSIM3 model. I hooked up a nmos transitor in the linear region, swept the Vds from -0.4 to +0.4V and measured Id thrue the transistor.

The attached plot shows Id, the first and second derivities of it. You see the discontinues I was describing. If you are using qpss with the RF signals as moderate signals qpss tries to linearize around the discontinues point, which is not possible. Therefor you get problems with the 1:3dB slope.

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Id_vs_Vds.png

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