kelly
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Hi all,
I think I finally understand (I hope) what you guys have been trying to tell me. Please see the IIP3 plot attached.
This is obtained by having the gate(LO), drain(IF) and source(RF) all biased at the same DC bias voltage, i.e. the drain/source are not biasd below the gate just below the threshold. Sure enough, you can clearly see the non-3db/db slope. My 1st IIP3 plot attached earlier (please see page 1), was obtained with the drain/source biased 400mV below the gate i.e., the devices are more on than the 0 bias case. I think that's why the problem of non-3db/db slope problem does not show up as prominantly as the one attached in this post.
I also obtain the same results using the harmonic balance method. Just as a reference, the model I am using is BSIM4(V4.5).
So I guess this pretty much conclude my IIP3 sim questions. By the way, the other simulations such as noise, s-parameters are still valid, as this modeling deficiency only affects the IM3 sim, right?
Please correct me if I am wrong, and thanks for all your patience.
Kelly
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