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Latch Comparator Noise Simulation (PSS/PNOISE) (Read 16551 times)
ahchang
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Latch Comparator Noise Simulation (PSS/PNOISE)
Jan 21st, 2011, 2:47pm
 
I am trying to design and simulate the input referred noise of a latch comparator in Cadence using SpectreRF. Since a latch comparator is a linear timer varying (LTV) system, a period steady state and a periodic noise analysis is needed to simulate the noise of the comparator. I’ve triggered my latch comparator by a periodic clock in order to use the framework of the RF circuit simulators.  I follow the steps described in Jaeha Kim’s paper (Simulation and Analysis of Random Decision Errors in Clocked Comparators), but I could not obtain the input referred noise from my SpectreRF simulation. I want to get a figure similar to Fig. 17 of the paper.

Here is what I have done:

1. In schematics, create a latch.  To make it into a periodic circuit, the inputs of the latch are properly biased with Vcm.  The differential inputs are set to dc = 1nV with pac = 1.  The clock is set to be a periodic square wave with period of 500ps (2GHz).

2. In PSS setting.
    (1) Beat Frequency = 2GHz.
    (2) Number of Harmonics = 0 (since we only need PSS to get a periodic steady state for PNOISE analysis)
    (3) Accuracy is set to conservative.

3. In PNOISE setting.
    (1) The frequency is swept from 1 to 1G (1/2 of beat frequency)
    (2) Maximum sideband is set to 10.
    (3) Select the differential output.  Select the input voltage source as input.
    (4) Set Reference Side-Band = -1
    (5) Select Noise Type = "Timedomain"

After the simulation, the "direct plot" option allows me to look at the integrated noise vs. time at the output.

Problems
(i) The integrated output noise changes with time with the maximum voltage noise ~ 240 V.  It seems a bit high even though it has not been referred back to the input.
(ii) It does not allow me to plot the input referred noise. I’ve tried changing the input to both voltage source and port, but both do not allow me to plot input referred noise.

Questions
(i) How to simulate/calculate the gain of such circuit at a specific observation time (tobv) right after the regeneration phase? I need this to get my input referred noise.  Is there a way to get input referred noise directly?
(ii) How to pick the reference side-band number since I am not interested in any particular frequency at the output?  I am interested in the total input referred noise at a specific observation time (tobv).
(iii) Would the changing the clock frequency affect the noise calculation? (I think not, but just want to check)

Any help would be very appreciated!  Thank you for your time.
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Andrew Beckett
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #1 - Jan 21st, 2011, 11:35pm
 
This is really in the wrong board (it should be in the RF Simulators board) - but I expect Ken will take care of moving it.

I'm not familiar with the paper you mention, but some general observations:
  1. You don't need to use a port to use the RF analyses (just in case you thought that was needed)
  2. I don't believe (if my memory is correct) that when using timedomain (strobed) noise it produces input referred noise. However, you should be able to use Results->Print->Noise Summary to do that (I think)
  3. I suspect your refsideband should be 0. Think of it this way, it is used to describe the frequency that your input signal should be relative to the output frequency. So fin=k*PSSfund+fout. Even so, this only affects computation of input referred noise (or noise figure, if that was what you wanted in other circumstances); the output noise is unaffected.
  4. Setting the pac magnitude on the source isn't used here, because you're not doing a pac analysis.

You could also use pxf in sampled mode to compute the gain, potentially.

The clock frequency could affect the noise, depending on the shape of the noise sources or if there is any bandwidth limitations in the circuit, but small changes are unlikely to have a major impact.

Sorry for not directly answering your questions - I've not really simulated this type of circuit with SpectreRF or thought about it enough, so I'm just answering some of the obvious things that come to mind as I read your post.

Regards,

Andrew.
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ahchang
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #2 - Jan 22nd, 2011, 7:49am
 
Hi Andrew,

Thank you for your reply.

I am trying to use either the source or the port component from analogLib because I thought one of them will let me see the input referred noise, but unfortunately, they both do not show the input referred noise from the "Noise Summary" windows. In the summary, it says the "Input Referred Noise is not available."  I am not sure why.

Thank you for the insight on Reference Sideband and pac magnitude.  I will try to use pxf to calculate my gain. In my case, I have a small DC voltage at the input of the comparator while clocking it with a 2GHz clock.  To do the pac or pxf analysis, I need to set pac = 1 (in addition to the small DC value I set for my input voltage source) and I want to know the small signal DC gain from input to output at tobv. tobv is the time somewhere between the middle of regeneration phase when input has no effect on the output. Would you mind clarifying the difference between using pac and pxf to simulate such gain in my case?

Thank you for your time!  I appreciate your previous helpful response.



Regards,

Albert

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Ken Kundert
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #3 - Jan 22nd, 2011, 10:20pm
 
I think you have it backward. If you want input referred noise, you should use either a voltage source or a current source. Input referred noise is not well defined for ports, which is why it is not supported.

-Ken
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ahchang
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #4 - Jan 23rd, 2011, 10:28am
 
Hi Ken,

I am sorry for the confusion.  What I meant to say is I've already tried using the voltage source as an input, but it does not let me plot the input referred noise.



Thanks,

Albert
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #5 - Mar 10th, 2011, 3:26pm
 
Hi Albert

I am trying to do the same and actually compare the results from pnoise to transient noise. The way I do tran noise is to enable noise in tran and then sweep the input around the trip point of the comparators and measure the probability distribution function. Then I fit the PDF to the erf function to get the equivalent noise. In Pnoise, I use a sine wave as one input measure the jitter of the ouptut. Then convert that jitter to equivalent noise.

Sorry for being brief.

The problem that I have is that I get 2 different results from the 2 simulation setups and I am trying to figure out which one is accurate.

I am checking to see if there is a reliable way of doing this that produces consistent results.

Thanks
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ywguo
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #6 - Sep 18th, 2012, 8:09pm
 
Hi Wghabrial,

What are the number for your both methods? They are interesting. I wanna know how much difference between those two results.


Best Regards,
Yawei
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weber8722
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #7 - Nov 22nd, 2012, 2:39am
 
Hi All,

Kim’s IEEE paper is great. It would be very interesting to have a database showing how to get out all the interesting stuff with spectreRF. I am using mainly transient noise, and can fully see the described effects, e.g. the a slower clk edge lowers the noise and jitter. But a real pnoise / pac analysis would give even more insights, like shown in the paper (like spectral distribution instead of just rms jitter/noise).

Bye Stephan
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wandola
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Re: Latch Comparator Noise Simulation (PSS/PNOISE)
Reply #8 - Aug 26th, 2014, 7:40pm
 
Hi all, I am also working on Pnoise simulation for clocked comparator. I followed exactly the way AhChang was doing. And I got similar results as Ahchang. I am wondering is anybody else working on this.. Cool
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