Hi Idriss,
The big difference between normal Verilog signals and wreal is that there is no standard resolution function for wreal. Cadence has created a few proprietary extensions that can help you to make bidirectional wreal ports.
Code:module switch(a, b, s);
inout a, b;
input s;
wreal a, b;
wire s;
real sigA, sigB;
always @(a or b or s) begin
sigA = a;
sigB = b;
if (s == 1'b1)
case (1)
(a === `wrealZState && b !== `wrealZState)
sigA = b;
(a !== `wrealZState && b === `wrealZState)
sigB = a;
endcase
end
assign a = sigA;
assign b = sigB;
endmodule
This is the general idea, anyway. I have not actually tested the above code, I'll leave that up to you. The whole point here is that the special symbols `wrealZState and `wrealXState are used to make the wreals behave similar to other four-state logic in Verilog.
Cheers,
Marq