I have 8 inputs. Each input represents discharge in binary.
For example: In0 - LSB, ..., In7 - MSB.
I have 1 output. I want that to out decimal code. And i want change period optionally.

I want know how to use "analog begin", and timer to write my code, because I don`t know how it works jointly.
I have write some code, that works but I have one's doubts about correct work. Is this works only when binary digit grows up? I need this to work when binary digit  downs (or grows).
But I don`t know how this works, beacuse I do not know how timer works. Is decimal out refresh out digits depending on timer or  decimal out saves constantly his digits?


Code:

// VerilogA for Kuykin_ADC, ladder, veriloga

`include "constants.vams"
`include "disciplines.vams"

module outdec (in0, in1, in2, in3, in4, in5, in6, in7, out);
input in0, in1, in2, in3, in4, in5, in6, in7;
electrical in0, in1, in2, in3, in4, in5, in6, in7;
output out;
electrical out;

// is it periodic? Set to 0 if you want it to be one shot
parameter integer periodic = 1;
parameter real initial_delay = 0;
parameter real period = 1u;

analog begin

	@(timer(initial_delay,period))
	begin

	end
	  if (V(in0) > 4.5)
	V(out) <+ 1;
	  else V(out) <+ 0;
	if (V(in1) > 4.5)
	V(out) <+ 2;
	else V(out) <+ 0;
	if (V(in2) > 4.5)
	V(out) <+ 4;
	else V(out) <+ 0;
	if (V(in3) > 4.5)
	V(out) <+ 8;
	else V(out) <+ 0;
	if (V(in4) > 4.5)
	V(out) <+ 16;
	else V(out) <+ 0;
	if (V(in5) > 4.5)
	V(out) <+ 32;
	else V(out) <+ 0;
	if (V(in6) > 4.5)
	V(out) <+ 64;
	else V(out) <+ 0;
	if (V(in7) > 4.5)
	V(out) <+ 128;
	else V(out) <+ 0;
end
endmodule