Hi, this is my first post here. I'm a grad student working in integrated optics and I'm pretty new to circuit designs. Hope someone can answer my questions since in my research group there are not a lot of people around that I can ask circuit questions
![Smiley Smiley](https://designers-guide.org/forum/Templates/Forum/default/smiley.gif)
I'm reading Thomas Lee's book The Design of CMOS Radio-Frequency Integrated Circuits (2nd ed). The question I have is about the biasing in Fig 12.11 page 389. Sorry that I cannot post the copyrighted content here, but if you don't have that book you can go here
http://books.google.com/books?id=io1hL48OqBsC&printsec=frontcover&dq=the+design+... , and browse down a little bit, try to find page 389.
We do have to bias the gate of M1 and M2, right? then M5 and M6 will be turned on and the voltage on the top of R3 can't equal to Vg1,2 anymore. Another question is that I don't quite understand how to use R5.
I might be asking the obvious, but please feel free to point me to another reference that can help answer my question. Thanks!