Rommel
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Posts: 3
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Hi BOE, and friends,
Actually it is the bug of IUS. I have just updated IUS from 8.2 to 9.2 and now the AMS is OK. I highly appreciate your help BOE.
Anyway, I want to export one design macro from Cadence Virtuoso to Synopsys IC compiler. For physical part, I can export to a gds file, and import it from ICC. For logic part, I still do not know how to do. There is a program Liberty but it is for standard cell. My macro is large (more than a DAC). I only need a dummy db file for logic part. Could you tell me how I can do.
Thank you so much.
Rommel
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