I'm doing a research about delta sigma adc and this is my first time to work with it and i have a little problem with the ELD(Excess Loop Delay) model. I used the method of direct path around the comparator to compensate for the Excess Delay and i calculated the new modulator's coefficients but it didn't work and i tried it more than one time but it didn't work Can anyone give a little example of the ELD models and how to calculate the new modulator's coefficients . By the way , i'm doing a CT 3rd order delta sigma adc.

If anyone have been working with Delta sigma ADCs before and want to share information with me please contact me on:
prof.eng1@yahoo.com
or at skype :
egyeng1 <------- skype name
You're all welcome to contact me ..

Regards,
Professor