Praveen K
Junior Member
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Posts: 25
Bangalore
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hi raj,
I'm attaching the STB analysis of a LDO driving a load of 10nF. The first stage is an high swing OTA, second stage is a PMOS of large size to drive the 10nF. In this case the dominate pole is the output pole and first non dominant is the gate of PMOS.
in the fig, (red--case with no compensation cap , green--with miller compensation of 100pf) you can see that adding a 100pF miller cap moved the nondominant pole(@ gate of PMOS) significantly to lesser frequency and doesn't help in anyway in PM. the dominant output pole remains almost same.
So i'm afraid i can't agree with what you say, cause miller cap can't help here. I agree with jjv, with his original argument.
Instead of this say we add a buffer stage in between the OTA and PMOS. here we will have three poles, dominant one again is the output pole, the two other non dominate poles( one at the output of OTA, another at the gate of PMOS) will be at a higher frequency because your buffer will have lesser input cap and low output impedence.
correct me if i'm wrong.
regards, Praveen
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