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Tones found in my PSD plot for a 2nd order dt dsm (Read 4750 times)
enigma2020
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Tones found in my PSD plot for a 2nd order dt dsm
Oct 01st, 2011, 8:26am
 
I am designing a 2nd order low pass 16 bit d-t delta sigma converter.  My sampling clock is 256 kHz and my OSR is 128.  I am using a 4 bit quantizer to obtain a SNR of > 98 dB( using matlab toolbox)  While running with ideal clocks, I obtained the correct 2nd order noise shaping curve and took the psd of the output in cadence (by using an ideal DAC) and got a SNR of about 115 dB (no tones)  When I used a non-ideal clock (standard 2 phase non-overlapping clock generator) to drive the circuit, I obtained the graph below.  

The PSD seems to show some tones at 600 Hz and 200 Hz (at 400 Hz intervals) from my input signal of 1k Hz.

Any clues why this is happening? Any help in trying to remove this tone issue or is it a simulation setting issue ?

I have tried many things like tightening up the accuracy with reltol and vabstol.  Changing the rise time of the clock generators.  Simplifying the clock generators by using only the minimum number of gates needed.  None of these were able to remove the tones in my pass band of 1 khz.  
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snr_real_clock1_crop.jpg
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enigma2020
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Re: Tones found in my PSD plot for a 2nd order dt dsm
Reply #1 - Oct 1st, 2011, 8:27am
 
I'm adding in the zoomed in version of the psd plot.  The tones can be see more clearly here.
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jefkat
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Re: Tones found in my PSD plot for a 2nd order dt dsm
Reply #2 - Oct 4th, 2011, 10:03am
 
What are the coefficients of integrators?
Are you using symmeteric ref voltages?

Try changing amplitude slightly and see if tones disappear or not?
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nrk1
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Re: Tones found in my PSD plot for a 2nd order dt dsm
Reply #3 - Oct 7th, 2011, 10:29am
 
See if each integrator output is updating by the right voltage in each
cycle(given Vref, number of DAC capacitors switched on and the feedback capacitor). Do this with the voltages measured differentially.
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Re: Tones found in my PSD plot for a 2nd order dt dsm
Reply #4 - Oct 23rd, 2011, 7:41pm
 
is this a behavioral model on a Simulink type platform or a transistor level simulation on a Spice type platform?

schematics, details and more information needed.
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enigma2020
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Re: Tones found in my PSD plot for a 2nd order dt dsm
Reply #5 - Dec 26th, 2011, 7:22am
 
Hi all,

first of all, thanks for replying to this problem.  To answer some of your questions.  This is a specter simulation ran with ideal opamps and non-ideal switches.  The ADC DAC was modeled in verilog-A and the values were updating correctly in the correct phases.  

The solution to the problem above is a setup issue.  Basically my sampling frequency was supposed to be 256 kHz so the period of my VPULSE should be 1/256kHz.  Which comes out to 3.90625e-6.  I put 3.9us as my sampling period so what happens is when I run my simulations and plot the FFT, I do not satisfy the coherent sampling condition.  Once I used the correct sampling frequency.  The results from the FFT turn out correct.  There are not more tones in my PSD plot and I have a 2nd order noise shaping curve.

Thanks again for your responses.  ;D

Cheers.

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