kevin.memi
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HI all,
I am using clock gating technique with IC compiler. My problem is concerning with min bitwidth of register bank. When setting minbitwidth to 8 or 16, there are still some gating cell connecting to only 2 or 3 flip-flop, it means bitwidth of register bank is smaller than 8 or 16 ??!!! Can anybody help me to explain this problem.
Thank you so much for your help
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