hello,
without adding compensation cap, it is very difficult to compensate unless you are ready to compromise some thing, for example your second pole is at drain of the Q5, so there try to reduce the cap otherwise try to increase the cap. By the way whats the load cap, try to increase that it will be compensated. Whats the CMFB architecture?

Thanks,
raj.

hello,

1. with 1uf load cap you are getting 30Mhz ugb? is it correct because to get this result you need gm of 4.5 for input pair.

2. But the formula what you are referring is under the assumption of dominate pole at the o/p and non dominate pole at drain of Q5 and in the formula you have keep capacitance of Q5 drain node cap rather than load cap.

3. How you are simulating PM, like in the open loop or closed loop? better use in fb, so that your bias point will be same.

Thanks,
raj.

hello,
any one can't tell with out schematic and operating point. please post schematic and response.

Thanks,
raj.

sorry....its 1pf

If you don't want to use any compensation capacitor, you can try to trade your UGBW for phase margin if you have the liberty of doing that. If not, i cannot think of any other way to improve your ckt stability.

UGBW= Adc*Wp   where Adc is DC gain and Wp is dominant pole
Adc=gm2*Rout
Wp=1/(Rout*CL)
=> UGBW=gm2/CL; so u can see to reduce UGBW you can just reduce the transconductance of your input differential pair.

graph 1