If I have 3 analog blocks: AAA BBB CCC, AAA is toplevel block, BBB is inside AAA and CCC is inside BBB block, if these is an analog signal called as xxx in CCC, now I want to monitor the xxx signal in another block (verilogams), how to do this in verilogasm?

I know if they are digital, we can use assignment to do it
wire xxx_monitor  =   AAA.BBB.CCC.xxx;

I read the Ken Kundert's book: The Designer's Guide to Verilog-AMS, but did not find which command or function I can use in verilogams.

Could you give me some suggestions? Thank you!

Use the absdelay event function if you're using Cadence tooling (it is a Cadence propietary extension).

Code:

real xxx_monitor;

always
  @(absdelay(V(AAA.BBB.CCC.xxx), 10m))
    xxx_monitor = V(AAA.BBB.CCC.xxx);
 

For non-Cadence tooling you can do the same but using the above event function:

Code:

real xxx_monitor;

always
  @(above(abs(V(AAA.BBB.CCC.xxx) - xxx_monitor) - 10m))
    xxx_monitor = V(AAA.BBB.CCC.xxx);
 

Cheers,
Marq