On another site a person was wondering how much a poly resistor would self heat if dissipating ~2.5 mW @ 2mA. I would have dismissed it, but I guess it can be a problem. Poly is encased in oxide so the thermal resistance to the outside world is relatively high. Do any of you know about what to expect for temp increase, or the typical recommended current density for poly?

A rough estimate would require a lot of parameters, even to get to the right order of magnitude. I agree with loos-electron on the current density part: they don't want the real resistors to deviate too much from the models they provide. =) I have not encountered any cases with self heating of large poly silicon resistor banks. Most of the heat related issues I had were temperature gradients across the chip, but the standard layout techniques easily covered this.

I doubt that the poly silicon height really matters. Usually the height is much smaller than the width and length. In principal it is about the area of the resistor, the distance to the good thermal conducting silicon, and the thermal conductivity of silicon dioxide (probably not a constant vs temp btw).

This is of course under the assumption of an ideal substrate. I guess for thinned substrates or even SOI, heat dissipation effects might be more pronounced (no experience here). I wonder how the thermal shocks given by ESD to the devices are handled over there.

I tried the heat sensor tool/gun once on a PCB but it was very difficult to use and I couldn't draw any conclusion from the images it gave. Especially the reflection of devices is very confusing.

I got some numbers for a 0.18u CMOS 250 ohm/sq unsilicided resistor from a friend. They surprised the heck out of me. I won't give you the exact numbers but the change in temperature is proportional to the square of the current density and is approximately:

0.4*Rsheet*(I/W)^2, where I is in mA and W is in um.

So, for 2 mA current in a resistor with a width of 1um the temp increase will be 100*(2/1)^2 = 400 C.

Wow.

At the maximum current density with no similar devices within 6um the temp increase is about 100C. Twice that if you have other resistors close by (I assume these resistors need to have the same current density but the rules didn't say). Don't push the limits for sure.

Luckily it is inversely related to the square of the width, so a width of 5um only increase the temp by 16 C.

Since the temp change is proportional to current density I would assume that changing the height of the poly would have the same effect as changing the width.

Actually, in my post I also did the calculation with the max current density that were in the rules that my friend gave me. The temp change was 100 C! I'm surprised they'd let it get that hot so the process guys probably put a lot of margin in that number.

This wasn't for a design I was doing so I don't have any rules of my own. I was helping a friend in academia. The rules given to students are often incomplete.

rg

It's a steady state temp. They had a second equation where the increase was about 2x if there were similar resistors close by. Maybe the thermal resistance of the oxide is so high that it dominates the paths to the thermal ground (or whatever they call it). They don't talk about packaging either so it is probably just a swag at the answer, but it is good to know when things get really hot.

I wonder if you could keep it cooler by covering it with "grounded" metal.

aaron_do wrote on Jan 3^rd, 2012, 9:13pm:


The oxide has a much lower thermal conductivity/higher thermal resistance than the substrate. Usually a resistor is made over STI hence it increases the distance to the thermally conducting substrate. So most of the delta T will be between the resistor and the substrate. The thermal resistance between the poly silicon and the substrate will be roughly:

Rth = z / ( k * L * W)

z : distance between poly silicon and substrate (height of the oxide between the resistor and the substrate)
k : thermal conductivity oxide
L,W : length and width of poly silicon resistor

Of course, this formula is very simple and only valid for large surfaces, for which the temperature increase is probably negligible.

aaron_do wrote on Jan 4^th, 2012, 1:04am:


The factor of 6 would hold only if you would have no lateral dispersion of the heat in your substrate. With the dispersion, I think you'll get temperature iso-clines that are related to the square of the distance to the heat source. The reason that I ignore this for the oxide, is that the resistor's sizes are assumed larger than the oxide layer thickness (only true for relatively large resistors).

RobG wrote on Jan 3^rd, 2012, 7:59pm:


As a matter of fact, you can do that. The "grounded" metal must however go to a suitable thermal sink, e.g. substrate and you want to use M1 for this cover as that would be closest to the poly. Given that the exact thermal coefficient will depend on the M1 pattern you lay out on top of your poly resistor, I would expect the foundry to provide a standard resistor with the shield on it, and a switch in the model which accounts for this shield when estimating self-heating.

By the way, it might be better to use diffusion resistors rather the poly if current densities are high enough to make self-heating significant. The resistor is then embedded in a well and can dissipate more heat into the substrate directly, and any M1 cover on top of it can be placed much closer to the resistor (vertical clearance).

Vivek