the current density thing is due to the math involved.

I did one of these about 10 years ago, and if you do differential current of different junction sizes a lot of the process varaibles fall out of the equation making the math simpler and less process dependent.

search the literatuire for stuff on temp sensors using PN diode junctions. Thees a bunch of publications in the area.

mixed_signal wrote on Feb 1^st, 2012, 6:53pm:

I assume that you have a bandgap reference provided. The bandgap value will likely be the largest source of the error so hopefully for you it is someone else's issue.

Quote:

It depends on the BJT area so you'll want to use a pretty small device - ~2x2 um^2. As I hope you know, if you operate two bipolars at two different current densities (say the ratio is M) then the difference between the emitters is kT/q*ln(M). That has no process dependence so you'll be in great shape.

Except that is only true at a proper bias.

To make sure you are in a good operating region, sweep the current and measure the voltage difference and note where it falls off at the high current and low current. Obviously you want to operate somewhere in the middle. Try this at hot/cold

Mismatch of your mirrors will have to be managed. BJTs match very well.

Quote:

Probably because that is how the guy before did it. I don't think there is any inherent advantage, but the bipolars can be relatively large so it can save area. You can also double sample the same BJT at two difference current densities to get the delta Vbe using only one BJT and a two value current source. I should have charged you for that one, but I won't tell you how to do it w/ a single current source  

If you can do it, put "N" BJTs in series or in Darlington configuration so that your differential voltage is N*kT/q*ln(M) instead of using an opamp to gain up the kT/q*ln(M) signal. Guess I'm in a "give it away" mood today.
Quote:

You'll want the lowest noise/highest gain possible, which is IMO a two stage Miller type opamp (except compensate it by putting the compensation between the gate/source of the output device for good AC PSRR).

Chop it. Barrel shift your mirror elements if they give you issues. Use as much current as you need and shut it down for 59 seconds. There, I just cut your power by a factor of 60 and solved your mismatch problems.   If you give me a VPN account and some money I can probably do it for 300nA on average.  

Hitting an uncalibrated accuracy spec of one degree is not trivial.

You will have to do chopping of all opamps. You will also have to do dynamic element matching.

Even with all these tricks you may not make it.

If you are in an advanced process the problems only get worse since the bipolar transistor betas drop terribly.

Check out the papers by Pertjis and Makinwa in IEEE JSSC.

Dan Clement wrote on Feb 2^nd, 2012, 6:27pm:


Dan - if you know a simple way to chop out the offsets from a second order let me know... I'm trying to understand that right now!
rg

Dan - Don. T was talking at lunch today about some CDS + chopping that Makinwa was doing so that must be the same thing. Quiquempoix (JSSCC july '06) did fractal chopper sequencing, but he has a patent on it .

I started writing equations for the output of the 2nd integrator with 1st stage chopping this morning. I can now see how the offset grows as Nsamp*Vos compared to Nsamp^2*Vin so it should help, but I don't know. I guess you also have to be careful of aliasing things back down.

So that is why I was thinking 1st order with so much time. Then you can chop and all you have to do is add up the result at the end!

rg

Jerry,

I have never seen this topology.  Do you have any reference material?  It sounds interesting.

Thanks,
Dan

Dan Clement wrote on Feb 6^th, 2012, 5:32am:



Its really not that well written on because the concept has been around so long.

In concept:

1. Build a VCO that is linear, frequency out is proportional to voltage in..

2. Connect VCO input to a reference voltage.

3. Count number of clock cycles that occur in a fixed time period.

4. Connect VCO to ground.

5. Count number of clock cycles that occur in a fixed time period.

6. Take the difference between the two numbers. (think line slope)

7. Use the DC = 0 value as the offset number.

8. The two numbers represent a conversion line now, you have an AX + B
transfer function.

The linearity of the ADC is a direct function of the linearity of the VCO
transfer. Using an op-amp  V to I converter into a capacitor, some comparators and switches
make for a simple but very linear oscillator.

Absolute value is dependent on the voltage reference.

Pretty simple works well, slow to convert, but capable to get it done.
Be careful of flicker noise, that bit me on one of these --  there
was no flicker in the models used.