Hi Every,

I am reading more than I could help much.

I am having convergences issue with veriloga model and the output log is quite unexplicit to find out the reasons or pointing me to the bad circuit modelled. May I have one of you helping me or giving some tips on the following code? Any advice to avoid convergence issue are welcome. I have simply the code get to the point.

The bias block is:
`include "constants.vams"
`include "disciplines.vams"

module bgBias_simple(vdd, ibp, gnd);
  input vdd, gnd;
  output ibp;

  electrical vdd, gnd, ibp;
  parameter real ibias = 100n;

  analog begin
     if (V(vdd, gnd) > 1)
           I(vdd, ibp) <+ ibias + ($temperature - 300.15) * 0.4n ;
     else
           I(vdd, ibp) <+ 1.0p;
  end
endmodule

The loaded block is:
`include "constants.vams"
`include "disciplines.vams"

module regulator_simple(vdd, ibp, enBat, gnd);
 input vdd, ibp, enBat, gnd;
 electrical vdd, ibp, enBat, gnd;

 real id;

 analog begin

   @(cross((V(ibp, gnd) + I(ibp, gnd)), 0));
     id = 0.1p * (limexp(V(ibp, gnd)/$vt)-1.0);
     if (V(enBat, gnd) > 0.0)
       begin
       if ((V(ibp, gnd) + I(ibp, gnd)) > 0)
         I(ibp, gnd) <+ id;
       else
         V(ibp, gnd) <+ 0.0;
       end
     else
       I(ibp, gnd) <+ 0.0;

 end
endmodule

So when I connect the both blocks and simulate I got a clear DC simulation but the transient crashed with the following statement:

Zero diagonal found in Jacobian at `net4' and `net4'.
Reordering Jacobian.
.........
Trying `homotopy = ptran' for initial conditions..
Trying `homotopy = arclength' for initial conditions.

Error found by spectre during IC analysis, during transient analysis `tran'.
   ERROR (SPECTRE-11005): Matrix is singular (detected at `net4').
   ERROR (SPECTRE-16385): There were 7 attempts to find the DC solution. In some of those attempts, a signal exceeded the blowup limit of its quantity. The last signal that failed is V(net4) = 1 GV, for which the quantity is `V' and the blowup limit is (1 GV). It is possible that the circuit has no DC solution. If you really want signals this large, set the `blowup' parameter of this quantity to a larger value.
   ERROR (SPECTRE-16080): No DC solution found (no convergence).  


The net4 is the net connecting ibp.regulator_simple to ibp.bgBias_simple. Please any helps will be more than welcome.

Thanks in advance,

Dear BOE,

Do you mean that I should not use 0.0 value?
Do you mind may be pointing me to an example illustrated what you recommend? I am glad to hear any advices on convergence.

Best regards,
Fabian

Dear Fabian,
fabian wrote on Jan 30^th, 2012, 4:26am:
See e.g. http://www.designers-guide.org/Forum/YaBB.pl?num=1211713371/4#4.
- B O E

Fabian,
if you connect the pins ibp of your bias and your regulator, you connect two current sources. If V(enBat, gnd) <= vth_logic the currents are probably not equal, so you need some path for the current in this case.
It is possible to change between a current source and a voltage source; however, you need to be very careful to avoid discontinuities (the code proposed does this). I prefer to use a source with dynamic source impedance (changed by a transition filter) wherever possible.
- B O E

Fabian,
fabian wrote on Jan 31^st, 2012, 7:09am:
This describes a "nonlinear resistor" (I(ibp, gnd) = f(V(ibp, gnd)) [OK, actually, a diode], not an ideal current source.
Quote:
E.g. (enabled 1.2V regulator):
Code:

...
real res = 1G;
analog begin
   if (V(enable, gnd) > vth_logic)
     res = 1; // enabled
   else
     res = 1G; // off

  V(out1, gnd) <+ 1.2;
  I(out, out1) <+ V(out, out1) * limexp(transition(ln(1/res), 0, 1n));
end
 

Note: this is to show the basic idea. You should use a cross or above event to check for level changes in the enable signal. BTW, for efficiency reasons you should use an implementation with only one analog (electrical) node.

- B O E

PS: Note that the transition filter input should change at discrete time points only. See LRM (Language Reference Manual) or tool vendor documentation. So this is not recommended:
Code:

  id = 0.1p * (limexp(V(ibp, gnd)/$vt)-1.0);
  I(ibp, gnd) <+ transition(id, 0, 1n); 

Edit: Changed code to Verilog-A syntax.

Dear Ken and BOE,

Thanks for your support. I am not able to verify the solution from BOE as the compiler does not understand $ln.

Regarding the gmin solution, I am not understand what do you mean? Are you saying that I need to add a large resistance to ground? Do you have an example of implementation?
Thanks in advance

Gmin is a large valued resistor, traditionally 1TΩ. You can add it either to the bias or the regulator blocks. To add it to the bias block, add
Code:

I(vdd, ibp) <+ V(vdd, ibp)/1T; 

to the end of the analog block. To add it to the regulator, change
Code:

I(ibp, gnd) <+ id; 

to
Code:

I(ibp, gnd) <+ id + V(ibp, gnd)/1T; 

-Ken