If we assume TDC and DCO completely linear, do we still have spurs unique to ADPLL? (except spurs due to SD modulator pattern, which is common to fractional-N PLL)

Is TDC resolution a problem? cause the PLL couldn't correct phase error less than TDC resolution. But would that turn into spurs or just noise?

Thanks raja.cedt!

I suppose TDC resolution is something unique to ADPLL. If the ADPLL fails to correct phase error less than TDC resolution, the quantization error could show up as spurs, am I right?