You could check your foundry's documentation to see what lengths and widths are covered by the transistor models.
If you're going to work in the uA domain it is fairly normal to have l>w. I've been using up to 1/10 without any problems on several processes. Just make sure your width is a good amount larger than the minimum width of the transistor since you're using it for analog. A bit of trust in your PDK models is okay, but too much can be fatal

mixed_signal wrote on Apr 5^th, 2012, 5:57am:


W=0.5um is fine. I'm using W=1um, L=40um for a similar amp right now. You might have to go longer than 10um to get the 1/f noise down.  

I would expect (but do not know) that dummy devices are especially important for such narrow widths.

mixed_signal wrote on Apr 6^th, 2012, 8:12pm:


Set the expected load and integrate the noise to infinity, i.e. increase the upper frequency bound until the noise value stops to increase.

mixed_signal wrote on Apr 6^th, 2012, 8:12pm:


ms... I think the proper way is to find the noise power density VN2() over the interval that you care about (say 1/(1 year) to 100 MHz) and then multiply by the frequency response (squared) of the sigma-delta, then integrate the product. You'll find the lower bound of integration isn't important after some point so maybe 1/(1 hour) is low enough frequency.

I'm not sure how to get the sigma-delta frequency response in the calculator. Maybe you could do something like VN2()*(sin(f)/f)^2. Alternatively, you could derive what the effective bandwidth is to the first zero, and then just integrate VN2() out to that voltage.

Let me know if you get a definitive answer!
Rob

aaron_do wrote on Apr 10^th, 2012, 5:29pm:


Yes, according to my 30 year old Grey/Meyer text anyway: "... the lower limit of the integration must be specified by the period of observation."

The text then gives two examples of lower integration limits on a noise problem for perspective:  
1 cycle/day:  Vnoise = 1.75 uV
1 cycle/year: Vnoise = 1.90 uV

For fun I tried the age of the universe (1 cycle/13.75 billion years) and came up with 2.4uV. I'd put a large error band around that number though  ;D

Your screenshot is not detailed enough for me to be sure, but this could also be trapezoidal ringing, which is a simulation artifact (see http://www.designers-guide.org/Forum/YaBB.pl?num=1101285512).

mixed_signal... something doesn't add up... one leg can't be oscillating and the other constant as the total current must remain the same (kirkoff's current law).

Someone posted a similar mysterious oscillation a few weeks ago and it turned out to be ringing in the bias current generator, not the opamp.