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purplewolf Senior Member Offline Posts: 103	RF design and dc op analysis issue Apr 24^th, 2012, 5:57am I have designed some RF blocks and i analysed them using standard analysis of PAC/PNOISE/PSS . It gave me desired performance. Now i discover when i run dc analysis that some critical devices are in linear or sub-threshhold region. Now since the design is sent to manufacturing. What performance should i except??
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aaron_do Senior Fellow Offline Posts: 1398	Re: RF design and dc op analysis issue Reply #1 - Apr 24^th, 2012, 5:25pm I think you can just check process corners and find out. Vary supply and temperature too. I assume you've properly modeled your system...
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rfcooltools.com

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Re: RF design and dc op analysis issue
Reply #2 - Apr 25^th, 2012, 9:28am

purplewolf,

Subthreshold operation is sometimes a more common mode of operation with deep submicron processes. The primary drawback of this region of operation is vt mismatch. vt mismatch always occurs in processing, and one way to mitigate these effects is to operate the device in saturation and increase the overdrive voltage such that vt mismatch becomes a smaller factor in current variations.

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loose-electron

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Re: RF design and dc op analysis issue
Reply #3 - May 5^th, 2012, 10:17am

purplewolf wrote on Apr 24^th, 2012, 5:57am:

I have designed some RF blocks �and i analysed them using standard analysis of PAC/PNOISE/PSS . It gave me desired performance. Now i discover when i run dc analysis that some critical devices are in linear or sub-threshhold region. Now since the design is sent to manufacturing. What performance should i except??

Something very basic here.

Before you start doing all the detailed simulation
work that you are describing, you need to get
the DC operating point right.

Is "manufacturing" mean a fabrication of some test devices,
or put into a manufactured product going out for sale?

Either way, you probably have problems.

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Contract IC-PCB-System Design - Analog, Mixed Signal, RF & Medical

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purplewolf Senior Member Offline Posts: 103	Re: RF design and dc op analysis issue Reply #4 - May 7^th, 2012, 7:19am For current mirrors its okay as all devices need to be in saturation.. but for block like gilbert cell mixer which is non-linear and a driven circuit, should dc analysis be performed on all corners and check every device in saturation.?
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