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Clock generator for latched comparator (Read 2470 times)

gsensor

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Posts: 33

Clock generator for latched comparator
Apr 24^th, 2012, 2:40pm

Hi guys,

I'm currently designing a latched comparator working with a 200 MHz ideal clock in Spectre Simulator with CMOSP13 IBM technology. I don't know if its best to implement this 200 MHz clock on-chip or to have an output signal linked to an off-chip clock generator. As I have no experienced with circuit working with a clock, I don't know which option is best in terms of precision ? My guess is going with an on-chip clock, but which topology, taking in consideration low complexity and low space ? A VCO, or do I need a PLL for this frequency ?

Thanks for your help,
gsensor

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carlgrace

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Berkeley, CA

Re: Clock generator for latched comparator
Reply #1 - May 11^th, 2012, 1:27pm

The answer to this really depends on your specs. An off-chip clock that you buffer on-chip is MUCH, MUCH, MUCH simpler than implementing a PLL. So your decision should be like this:

1. Can I make an off-chip clock work? Why not? Can I address any of the reasons why not in a simple way?

2. I have no choice, I will need a PLL.

The thing is, if you have an on-chip clock generator, you will potentially have much better jitter performance (and programmablility) but you'll STILL need an off-chip clock for a reference.

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loose-electron Senior Fellow Offline Best Design Tool = Capable Designers Posts: 1638 San Diego California	Re: Clock generator for latched comparator Reply #2 - May 24^th, 2012, 1:33pm external clock if available elsewhere in your system, probably crystal generated. Take whatever the available frequency is and divide it down inside your design to the desired frequency. Things like RC oscillators etc are not very accurate.
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