Hi Raj,
What's your purpose of controlling the delay of inverters? You asked the way to get fine delay. How fine? <10ps or ??
Even on-chip microstrip lines are adopted to get very fine delay, like 10ps/step. Please refer the following paper.
Quote: A 10 ps Resolution 1.6 ns Tuning Range CMOS Delay Line for Clock Deskewing in Data Recovery Systems
Gogaert, S.; Steyaert, M.
Solid-State Circuits Conference, 1995. ESSCIRC '95. Twenty-first European
Publication Year: 1995 , Page(s): 54 - 57
IEEE Conference Publications
Yawei