loose-electron wrote on Sep 19th, 2012, 7:42am:plot a set of bias curves for the transistors at a fixed geometry.
Use W/L scaling to get to the desired current.
Done.
Strongly agree with this. A bunch of hand calculation with square-law models will be a waste of time.
I'd suggest you look into the gm/I design methodology. It works really well with nanometer processes.