Hi,

Given a choice to use both npn/pnp bjts  in a cmos process which one is better to use in Bandgap reference design? Assume both of them have same beta (current gain=ic/ib)

As already known having poor beta causes additional voltage drop in base resistance which could finally limit the accuracy of bandgap.  Is it just enough to pick the one which has higher beta?

Area there any other tradeoffs related to inherent curvature of VBE, area, speed etc?

Or are there any better topologies in which only one of them could be employed?

Thanks,
yvkrishna

Speed may be an issue in that slower devices may be harder to stabilise in a feedback loop. In a CMOS process I would expect that the npn will be much faster than any pnp. Often the pnp is not a real one. The best bandgaps use bipolars as transistors, not merely as diodes, and use both types throughout. A key issue when Mosfets are used, is the difficulty in trimming to a universal “magic” voltage. If all bipolars are used, all offsets are tuneable  ptats. That is, if the bg is trimed to the magic voltage, it will have the correct square shape temperature curve, irrespective of individual errors. This is important as it allows the band gap to be set with one trim at, say, 27 deg. Unless all Mosfets are relatively, absolutely huge, say 200u/40u, a trim to what should be a magic voltage won’t be. In which case production trimming becomes a nightmare.

this was asked over a year ago...