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Idea of using current mode BGR to avoid v2i design (Read 15870 times)
yvkrishna
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Idea of using current mode BGR to avoid v2i design
Oct 13th, 2012, 3:21pm
 
Hi everyone,

Usually voltage mode bandgap is designed which is followed by a V2I block to generate currents for providing to all parts of the chip.

Instead if we use a current mode BGR we could get directly generate zero TC current, isn't this beneficial in-terms of area,power,errors of this additional V2I block?

Are there any preliminary considerations for budgeting this?

Thanks,
yvkrishna
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ywguo
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Re: Idea of using current mode BGR to avoid v2i design
Reply #1 - Oct 15th, 2012, 6:24am
 
Hi yvkrishna,

What is the schematic or structure for your current mode BGR? I have no idea that generate a zero TC current with a current mode BGR.

Best Regards,
Yawei
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yvkrishna
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Re: Idea of using current mode BGR to avoid v2i design
Reply #2 - Oct 15th, 2012, 8:23am
 
Hi Yawei,

please look into this paper
http://www.ing.unibs.it/~richelli/matpdsia/bg1.pdf

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« Last Edit: Oct 15th, 2012, 9:31pm by yvkrishna »  

currModeBGR_002.png
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rfidea
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Re: Idea of using current mode BGR to avoid v2i design
Reply #3 - Oct 15th, 2012, 1:31pm
 
It looks like the BGR circuit you refer to generates a voltage and then a current proportional to that voltage. No true current BGR. There is no such thing, not yet discovered anyway.
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yvkrishna
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Re: Idea of using current mode BGR to avoid v2i design
Reply #4 - Oct 15th, 2012, 1:57pm
 
@rfidea,

There is no voltage generated here in the BG loop.(infact zero TC current is used to generate voltage here)
If you are referring to current leg with M2+R20 in the figure it also mirrors current from the BGcore and then creates a voltage.
So this generated voltage has nothing to do with the current generation.

Please let me know if I understood your comment correctly.


--yvkrishna
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ywguo
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Re: Idea of using current mode BGR to avoid v2i design
Reply #5 - Oct 15th, 2012, 7:43pm
 
As what rfidea said, that is not true current BGR. I mean that there is not any zero TC current in that BGR.

Yawei
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yvkrishna
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Re: Idea of using current mode BGR to avoid v2i design
Reply #6 - Oct 15th, 2012, 9:31pm
 
@rfidea,

could you please elaborate your comment.

I dont find any reason for not having zero TC current in the BG core shown (pls see the currents marked in the fig).  

If we work it out completely there is a dependency of resistor TC on the current which we generate, other than that its very much same as conventional voltage Bandgap.
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boe
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Re: Idea of using current mode BGR to avoid v2i design
Reply #7 - Oct 16th, 2012, 2:14am
 
yvkrishna wrote on Oct 15th, 2012, 9:31pm:
...
If we work it out completely there is a dependency of resistor TC on the current ...
That is the point!
- B O E
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yvkrishna
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Re: Idea of using current mode BGR to avoid v2i design
Reply #8 - Oct 16th, 2012, 2:55am
 
Hi BOE,
We can always calculate the modified condition for achieving zero temp coeff in the presence of finite TC for resistors.

my observation so far is that the impact of resistor TC is not so much(ofcourse it depends on process one uses) for achieving ZTC current.

What else is the limitation?

Thanks,
yvkrishna
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boe
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Re: Idea of using current mode BGR to avoid v2i design
Reply #9 - Oct 16th, 2012, 6:34am
 
yvkrishna,

your circuit creates a weighted sum of VBE and VT across R20. So it is a bandgap (if properly scaled). Iout is generated by converting the bandgap voltage converted to a current through R20.

So it is a V2I design, too

- B O E
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yvkrishna
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Re: Idea of using current mode BGR to avoid v2i design
Reply #10 - Oct 16th, 2012, 8:49am
 
I agree with BOE, so its inherently present in the same circuit.

And so my query comes- why cant we just design this to avoid additional v2i block design altogether.

-yvkrishna
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boe
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Re: Idea of using current mode BGR to avoid v2i design
Reply #11 - Oct 16th, 2012, 10:20am
 
Because (as rfidea already pointed out) "[t]here is no such thing, not yet discovered anyway."
- B O E
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rfidea
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Re: Idea of using current mode BGR to avoid v2i design
Reply #12 - Oct 16th, 2012, 1:13pm
 
It looks like everything is said in this matter. What I mean is that there is a principal difference if your circuit first generates a voltage and then a current proportional to that voltage, compared to a circuit that directly generates the current. The first exist, it is a BGR, the second does not, not yet anyway.
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yvkrishna
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Re: Idea of using current mode BGR to avoid v2i design
Reply #13 - Oct 18th, 2012, 2:24pm
 
sorry guys may I should not have called it as currentmode BGR, rather its just a current summing BGR.

let me re-frame the question which I am actually looking to get inputs for :
A current reference can be generated in 2ways
(1). use conventional voltage BGR (which gives ~1.2V output)and follow it with an explicit v2i block which typically has an opamp with current source+resistor)
(2). use the BGR shown in the fig above.

In case (2) we can altogether avoid designing this additional errorAmplifier in v2i stage which looks easier and better in terms of area,power and all errors(noise,offsets) introduced by this block.

Is this idea correct?

-yvkrishna
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boe
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Re: Idea of using current mode BGR to avoid v2i design
Reply #14 - Oct 19th, 2012, 12:00pm
 
yvkrishna,

what about PSRR and matching of M0/M1?

- B O E
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